Self-Adaptive Run-Time Variable Floating-Point Precision for Iterative Algorithms: A Joint HW/SW Approach
Using standard Floating-Point (FP) formats for computation leads to significant hardware overhead since these formats are over-designed for error-resilient workloads such as iterative algorithms. Hence, hardware FP Unit (FPU) architectures need run-time variable precision capabilities. In this work,...
Main Authors: | Noureddine Ait Said, Mounir Benabdenbi, Katell Morin-Allory |
---|---|
Format: | Article |
Language: | English |
Published: |
MDPI AG
2021-09-01
|
Series: | Electronics |
Subjects: | |
Online Access: | https://www.mdpi.com/2079-9292/10/18/2209 |
Similar Items
-
Dynamic Compilation for Transprecision Applications on Heterogeneous Platform
by: Julie Dumas, et al.
Published: (2021-06-01) -
Effectiveness of Floating-Point Precision on the Numerical Approximation by Spectral Methods
by: José A. O. Matos, et al.
Published: (2021-05-01) -
The application flow of Stratus HLS tool in high performance double precision floating point multiplication design
by: Yuan Jiahong
Published: (2018-08-01) -
Uncertainty in the Physical Testing of Floating Wind Energy Platforms’ Accuracy versus Precision
by: Cian J. Desmond, et al.
Published: (2019-01-01) -
The Influence of the Cuboid Float’s Parameters on the Stability of a Floating Building
by: Karczewski Artur, et al.
Published: (2020-09-01)