The Design of IP Core for LCD Controller Based on SOPC

In this paper, it introduces the design and implementation of custom IP core for liquid crystal display (LCD) controller based on system on a programmable chip (SOPC) technology and Verilog hardware description language (HDL). The IP core can be put up as a general-purpose peripheral module to the A...

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Main Authors: Li Mingfeng, Zhou Xifeng, Guo Qiangang
Format: Article
Language:English
Published: EDP Sciences 2018-01-01
Series:MATEC Web of Conferences
Online Access:https://doi.org/10.1051/matecconf/201823204074
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spelling doaj-da63a749b8b0444d87347b09b227c1402021-02-02T05:41:31ZengEDP SciencesMATEC Web of Conferences2261-236X2018-01-012320407410.1051/matecconf/201823204074matecconf_eitce2018_04074The Design of IP Core for LCD Controller Based on SOPCLi Mingfeng0Zhou Xifeng1Guo Qiangang2Automated institute, Nangjing University of Posts and TelecommunicationsAutomated institute, Nangjing University of Posts and TelecommunicationsAutomated institute, Nangjing University of Posts and TelecommunicationsIn this paper, it introduces the design and implementation of custom IP core for liquid crystal display (LCD) controller based on system on a programmable chip (SOPC) technology and Verilog hardware description language (HDL). The IP core can be put up as a general-purpose peripheral module to the Avalon Bus, communicating with the NIOS II through registers, and the underlying sequential logic for communicating with the external LCD liquid crystal module is automatically completed by the module. The driver does not need to care about the details of the underlying timing, it only needs to implement the read and write operations of the LCD data through register access, thus achieve the purpose of controlling the display content of the LCD. In addition to reducing the complexity of driver development, the design can also take full advantage of the parallel operation of hardware logic to improve the execution efficiency of the entire system and the throughput of processing tasks, especially in some occasions where high-speed image real-time processing is required. Simulations and experiments show that the IP core for LCD controller has good stability, versatility and compatibility.https://doi.org/10.1051/matecconf/201823204074
collection DOAJ
language English
format Article
sources DOAJ
author Li Mingfeng
Zhou Xifeng
Guo Qiangang
spellingShingle Li Mingfeng
Zhou Xifeng
Guo Qiangang
The Design of IP Core for LCD Controller Based on SOPC
MATEC Web of Conferences
author_facet Li Mingfeng
Zhou Xifeng
Guo Qiangang
author_sort Li Mingfeng
title The Design of IP Core for LCD Controller Based on SOPC
title_short The Design of IP Core for LCD Controller Based on SOPC
title_full The Design of IP Core for LCD Controller Based on SOPC
title_fullStr The Design of IP Core for LCD Controller Based on SOPC
title_full_unstemmed The Design of IP Core for LCD Controller Based on SOPC
title_sort design of ip core for lcd controller based on sopc
publisher EDP Sciences
series MATEC Web of Conferences
issn 2261-236X
publishDate 2018-01-01
description In this paper, it introduces the design and implementation of custom IP core for liquid crystal display (LCD) controller based on system on a programmable chip (SOPC) technology and Verilog hardware description language (HDL). The IP core can be put up as a general-purpose peripheral module to the Avalon Bus, communicating with the NIOS II through registers, and the underlying sequential logic for communicating with the external LCD liquid crystal module is automatically completed by the module. The driver does not need to care about the details of the underlying timing, it only needs to implement the read and write operations of the LCD data through register access, thus achieve the purpose of controlling the display content of the LCD. In addition to reducing the complexity of driver development, the design can also take full advantage of the parallel operation of hardware logic to improve the execution efficiency of the entire system and the throughput of processing tasks, especially in some occasions where high-speed image real-time processing is required. Simulations and experiments show that the IP core for LCD controller has good stability, versatility and compatibility.
url https://doi.org/10.1051/matecconf/201823204074
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