Memory Operation of Z²-FET Without Selector at High Temperature

The electrical performance of Z<sup>2</sup>-FET and memory operations of matrix are demonstrated at high temperatures up to 125 &#x00B0;C. The sharp subthreshold slope is maintained and the reliable operation is ensured within the memory window of 229 mV even though the turn on volta...

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Main Authors: S. Kwon, C. Navarro, F. Gamiz, S. Cristoloveanu, Y.-T. Kim, J. Ahn
Format: Article
Language:English
Published: IEEE 2021-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9471808/
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spelling doaj-d7b6a709f5934e2494166812630cecc12021-07-13T23:00:19ZengIEEEIEEE Journal of the Electron Devices Society2168-67342021-01-01965866210.1109/JEDS.2021.30941049471808Memory Operation of Z&#x00B2;-FET Without Selector at High TemperatureS. Kwon0https://orcid.org/0000-0003-0250-6788C. Navarro1https://orcid.org/0000-0002-7846-4599F. Gamiz2https://orcid.org/0000-0002-5072-7924S. Cristoloveanu3https://orcid.org/0000-0002-3576-5586Y.-T. Kim4J. Ahn5Division of Materials Science and Engineering, Hanyang University, Seoul, South KoreaDepartment of Electronics, University of Granada, Granada, SpainDepartment of Electronics, University of Granada, Granada, SpainIMEP-LAHC, Grenoble INP MINATEC, Grenoble, FranceDivision of Materials Science and Engineering, Hanyang University, Seoul, South KoreaDivision of Materials Science and Engineering, Hanyang University, Seoul, South KoreaThe electrical performance of Z<sup>2</sup>-FET and memory operations of matrix are demonstrated at high temperatures up to 125 &#x00B0;C. The sharp subthreshold slope is maintained and the reliable operation is ensured within the memory window of 229 mV even though the turn on voltage of &#x2018;0&#x2019;- and &#x2018;1&#x2019;-states are shifted to lower voltage. The &#x2018;0&#x2019;-state current remains low while the &#x2018;1&#x2019;-state current gradually increases as the temperature increases leading to higher current margin. At the elevated temperature, the potential barriers are slightly reduced but does not collapse, which leads to the successful memory operation. However, increasing the temperature over 125 &#x00B0;C, the potential barrier at the &#x2018;0&#x2019;-state is significantly reduced and causes the failure of memory operation with high &#x2018;0&#x2019;-state current. The matrix demonstrates reliable memory operations without using selector circuits even at 125 &#x00B0;C.https://ieeexplore.ieee.org/document/9471808/Matrix memory operationhigh temperatureZ²-FET1T-DRAM
collection DOAJ
language English
format Article
sources DOAJ
author S. Kwon
C. Navarro
F. Gamiz
S. Cristoloveanu
Y.-T. Kim
J. Ahn
spellingShingle S. Kwon
C. Navarro
F. Gamiz
S. Cristoloveanu
Y.-T. Kim
J. Ahn
Memory Operation of Z&#x00B2;-FET Without Selector at High Temperature
IEEE Journal of the Electron Devices Society
Matrix memory operation
high temperature
Z²-FET
1T-DRAM
author_facet S. Kwon
C. Navarro
F. Gamiz
S. Cristoloveanu
Y.-T. Kim
J. Ahn
author_sort S. Kwon
title Memory Operation of Z&#x00B2;-FET Without Selector at High Temperature
title_short Memory Operation of Z&#x00B2;-FET Without Selector at High Temperature
title_full Memory Operation of Z&#x00B2;-FET Without Selector at High Temperature
title_fullStr Memory Operation of Z&#x00B2;-FET Without Selector at High Temperature
title_full_unstemmed Memory Operation of Z&#x00B2;-FET Without Selector at High Temperature
title_sort memory operation of z&#x00b2;-fet without selector at high temperature
publisher IEEE
series IEEE Journal of the Electron Devices Society
issn 2168-6734
publishDate 2021-01-01
description The electrical performance of Z<sup>2</sup>-FET and memory operations of matrix are demonstrated at high temperatures up to 125 &#x00B0;C. The sharp subthreshold slope is maintained and the reliable operation is ensured within the memory window of 229 mV even though the turn on voltage of &#x2018;0&#x2019;- and &#x2018;1&#x2019;-states are shifted to lower voltage. The &#x2018;0&#x2019;-state current remains low while the &#x2018;1&#x2019;-state current gradually increases as the temperature increases leading to higher current margin. At the elevated temperature, the potential barriers are slightly reduced but does not collapse, which leads to the successful memory operation. However, increasing the temperature over 125 &#x00B0;C, the potential barrier at the &#x2018;0&#x2019;-state is significantly reduced and causes the failure of memory operation with high &#x2018;0&#x2019;-state current. The matrix demonstrates reliable memory operations without using selector circuits even at 125 &#x00B0;C.
topic Matrix memory operation
high temperature
Z²-FET
1T-DRAM
url https://ieeexplore.ieee.org/document/9471808/
work_keys_str_mv AT skwon memoryoperationofzx00b2fetwithoutselectorathightemperature
AT cnavarro memoryoperationofzx00b2fetwithoutselectorathightemperature
AT fgamiz memoryoperationofzx00b2fetwithoutselectorathightemperature
AT scristoloveanu memoryoperationofzx00b2fetwithoutselectorathightemperature
AT ytkim memoryoperationofzx00b2fetwithoutselectorathightemperature
AT jahn memoryoperationofzx00b2fetwithoutselectorathightemperature
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