Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices: Design Considerations

In recent years, deep neural networks (DNN) have demonstrated significant business impact in large scale analysis and classification tasks such as speech recognition, visual object detection, pattern extraction, etc. Training of large DNNs, however, is universally considered as time consuming and co...

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Main Authors: Tayfun Gokmen, Yurii Vlasov
Format: Article
Language:English
Published: Frontiers Media S.A. 2016-07-01
Series:Frontiers in Neuroscience
Subjects:
Online Access:http://journal.frontiersin.org/Journal/10.3389/fnins.2016.00333/full
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spelling doaj-d540f6a8912d40d5ba1f670dc3eae1512020-11-25T01:06:50ZengFrontiers Media S.A.Frontiers in Neuroscience1662-453X2016-07-011010.3389/fnins.2016.00333203376Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices: Design ConsiderationsTayfun Gokmen0Yurii Vlasov1IBM T. J. Watson Research CenterIBM T. J. Watson Research CenterIn recent years, deep neural networks (DNN) have demonstrated significant business impact in large scale analysis and classification tasks such as speech recognition, visual object detection, pattern extraction, etc. Training of large DNNs, however, is universally considered as time consuming and computationally intensive task that demands datacenter-scale computational resources recruited for many days. Here we propose a concept of resistive processing unit (RPU) devices that can potentially accelerate DNN training by orders of magnitude while using much less power. The proposed RPU device can store and update the weight values locally thus minimizing data movement during training and allowing to fully exploit the locality and the parallelism of the training algorithm. We evaluate the effect of various RPU device features/non-idealities and system parameters on performance in order to derive the device and system level specifications for implementation of an accelerator chip for DNN training in a realistic CMOS-compatible technology. For large DNNs with about 1 billion weights this massively parallel RPU architecture can achieve acceleration factors of 30,000X compared to state-of-the-art microprocessors while providing power efficiency of 84,000 GigaOps/s/W. Problems that currently require days of training on a datacenter-size cluster with thousands of machines can be addressed within hours on a single RPU accelerator. A system consisting of a cluster of RPU accelerators will be able to tackle Big Data problems with trillions of parameters that is impossible to address today like, for example, natural speech recognition and translation between all world languages, real-time analytics on large streams of business and scientific data, integration and analysis of multimodal sensory data flows from a massive number of IoT (Internet of Things) sensors.http://journal.frontiersin.org/Journal/10.3389/fnins.2016.00333/fullNanotechnologymachine learningartificial intelligenceartificial neural networksMemristive Devicessynaptic device
collection DOAJ
language English
format Article
sources DOAJ
author Tayfun Gokmen
Yurii Vlasov
spellingShingle Tayfun Gokmen
Yurii Vlasov
Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices: Design Considerations
Frontiers in Neuroscience
Nanotechnology
machine learning
artificial intelligence
artificial neural networks
Memristive Devices
synaptic device
author_facet Tayfun Gokmen
Yurii Vlasov
author_sort Tayfun Gokmen
title Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices: Design Considerations
title_short Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices: Design Considerations
title_full Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices: Design Considerations
title_fullStr Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices: Design Considerations
title_full_unstemmed Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices: Design Considerations
title_sort acceleration of deep neural network training with resistive cross-point devices: design considerations
publisher Frontiers Media S.A.
series Frontiers in Neuroscience
issn 1662-453X
publishDate 2016-07-01
description In recent years, deep neural networks (DNN) have demonstrated significant business impact in large scale analysis and classification tasks such as speech recognition, visual object detection, pattern extraction, etc. Training of large DNNs, however, is universally considered as time consuming and computationally intensive task that demands datacenter-scale computational resources recruited for many days. Here we propose a concept of resistive processing unit (RPU) devices that can potentially accelerate DNN training by orders of magnitude while using much less power. The proposed RPU device can store and update the weight values locally thus minimizing data movement during training and allowing to fully exploit the locality and the parallelism of the training algorithm. We evaluate the effect of various RPU device features/non-idealities and system parameters on performance in order to derive the device and system level specifications for implementation of an accelerator chip for DNN training in a realistic CMOS-compatible technology. For large DNNs with about 1 billion weights this massively parallel RPU architecture can achieve acceleration factors of 30,000X compared to state-of-the-art microprocessors while providing power efficiency of 84,000 GigaOps/s/W. Problems that currently require days of training on a datacenter-size cluster with thousands of machines can be addressed within hours on a single RPU accelerator. A system consisting of a cluster of RPU accelerators will be able to tackle Big Data problems with trillions of parameters that is impossible to address today like, for example, natural speech recognition and translation between all world languages, real-time analytics on large streams of business and scientific data, integration and analysis of multimodal sensory data flows from a massive number of IoT (Internet of Things) sensors.
topic Nanotechnology
machine learning
artificial intelligence
artificial neural networks
Memristive Devices
synaptic device
url http://journal.frontiersin.org/Journal/10.3389/fnins.2016.00333/full
work_keys_str_mv AT tayfungokmen accelerationofdeepneuralnetworktrainingwithresistivecrosspointdevicesdesignconsiderations
AT yuriivlasov accelerationofdeepneuralnetworktrainingwithresistivecrosspointdevicesdesignconsiderations
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