Research on the Simulation-based Fault Injection Design with Consideration of Board-level Built-In Test

• Main Authors: Y. Li, P. Xu, H. Wan
• Format: Article
• Language: English
• Published: AIDIC Servizi S.r.l. 2013-07-01
• Series: Chemical Engineering Transactions
• Online Access: https://www.cetjournal.it/index.php/cet/article/view/6308

As embedded system is widely used in setting up avionic devices, it’s important to verify and validate the system’s reliability. With the help of Built-In Test (BIT) technology, faults can be reported and isolated. Especially the software BIT, which is a popular solution to test the dependability of embedded boards and the entire system. Furthermore, the demand for dependable BIT software becomes more urgent. This paper discusses the general requirements for BIT software testing including fault mode analysis, and then presents a simulation platform which simulates embedded hardware boards and the external environments, such as bus devices, Ethernet, and etc. At the same time, hardware faults and I/O data faults are modelled, simulated and injected in this simulation system. Those contributed a simulated BIT software operating system to perform board-level BIT software testing. Compared to traditional fault injection tools, this system takes advantage of flexibility based on the software simulation technology and does no harm or irruption to either the real hardware or the software. In addition, this system can be expanded with more other fault modes including both on-board and on-bus using the simulation method mentioned in this paper. In the future, it’s expected to build a robust simulation-based fault injection system that satisfies all the general requirements in BIT software testing and this method can be applied to the further research on PHM system validation.