A Design Technique for Adapting Number and Boundaries of Reconfigurable Modules at Runtime

Runtime reconfigurable system-on-chip designs for FPGAs pose manifold demands on the underlying system architecture and design tool capabilities. The system architecture has to support varying communication needs of a changing number of processing units mapped onto diverse locations. Design tools sh...

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Bibliographic Details
Main Authors: Thilo Pionteck, Roman Koch, Carsten Albrecht, Erik Maehle
Format: Article
Language:English
Published: Hindawi Limited 2009-01-01
Series:International Journal of Reconfigurable Computing
Online Access:http://dx.doi.org/10.1155/2009/942930

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