Topological Horseshoe Analysis and FPGA Implementation of a Classical Fractional Order Chaotic System
Scholars have done extensive research on dynamic analysis and analog circuits implementation of the classical fractional order chaotic system-Liu System (FOLS). However, they did not rigorously prove the existence of FOLS from the perspective of mathematics. And they also did not effectively design...
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doaj-ce10a7f9cc9d4fa29824a02142420e1e2021-03-29T23:25:33ZengIEEEIEEE Access2169-35362019-01-01712909512910310.1109/ACCESS.2019.29385568821275Topological Horseshoe Analysis and FPGA Implementation of a Classical Fractional Order Chaotic SystemEnzeng Dong0https://orcid.org/0000-0001-5142-5584Mingfeng Yuan1Fangfang Han2Jigang Tong3Shengzhi Du4Tianjin Key Laboratory for Control Theory and Applications in Complicated Systems, Tianjin University of Technology, Tianjin, ChinaDepartment of Mechanical Engineering, Tshwane University of Technology, Pretoria, South AfricaDepartment of Mechanical Engineering, Tshwane University of Technology, Pretoria, South AfricaTianjin Key Laboratory for Control Theory and Applications in Complicated Systems, Tianjin University of Technology, Tianjin, ChinaDepartment of Mechanical Engineering, Tshwane University of Technology, Pretoria, South AfricaScholars have done extensive research on dynamic analysis and analog circuits implementation of the classical fractional order chaotic system-Liu System (FOLS). However, they did not rigorously prove the existence of FOLS from the perspective of mathematics. And they also did not effectively design digital circuits to generate signals of the fractional order chaotic systems, especially the 2.7-order system. This paper selects an appropriate Poincaré section where a first return Poincaré map of FOLS was defined. Based on computer-assisted verification method, the conclusion is that the Poincaré map is semi-conjugate to a 2-shift map and the topological entropy of the map is no less than ln 2, which rigorously verifies the existence of chaotic behavior in the 2.7-order Liu system. This proof is necessary before the chaotic system is used for information encryption. The next and most significant task is to build a system model through DSP-Builder software and generate chaotic signals using Field Programmable Gate Array chip. The results of oscilloscope consistent with numerical simulations, which lays the foundation for image and video streaming encryption.https://ieeexplore.ieee.org/document/8821275/Computer-assisted prooffractional order liu SystemFPGA implementationtopological horseshoe analysis |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Enzeng Dong Mingfeng Yuan Fangfang Han Jigang Tong Shengzhi Du |
spellingShingle |
Enzeng Dong Mingfeng Yuan Fangfang Han Jigang Tong Shengzhi Du Topological Horseshoe Analysis and FPGA Implementation of a Classical Fractional Order Chaotic System IEEE Access Computer-assisted proof fractional order liu System FPGA implementation topological horseshoe analysis |
author_facet |
Enzeng Dong Mingfeng Yuan Fangfang Han Jigang Tong Shengzhi Du |
author_sort |
Enzeng Dong |
title |
Topological Horseshoe Analysis and FPGA Implementation of a Classical Fractional Order Chaotic System |
title_short |
Topological Horseshoe Analysis and FPGA Implementation of a Classical Fractional Order Chaotic System |
title_full |
Topological Horseshoe Analysis and FPGA Implementation of a Classical Fractional Order Chaotic System |
title_fullStr |
Topological Horseshoe Analysis and FPGA Implementation of a Classical Fractional Order Chaotic System |
title_full_unstemmed |
Topological Horseshoe Analysis and FPGA Implementation of a Classical Fractional Order Chaotic System |
title_sort |
topological horseshoe analysis and fpga implementation of a classical fractional order chaotic system |
publisher |
IEEE |
series |
IEEE Access |
issn |
2169-3536 |
publishDate |
2019-01-01 |
description |
Scholars have done extensive research on dynamic analysis and analog circuits implementation of the classical fractional order chaotic system-Liu System (FOLS). However, they did not rigorously prove the existence of FOLS from the perspective of mathematics. And they also did not effectively design digital circuits to generate signals of the fractional order chaotic systems, especially the 2.7-order system. This paper selects an appropriate Poincaré section where a first return Poincaré map of FOLS was defined. Based on computer-assisted verification method, the conclusion is that the Poincaré map is semi-conjugate to a 2-shift map and the topological entropy of the map is no less than ln 2, which rigorously verifies the existence of chaotic behavior in the 2.7-order Liu system. This proof is necessary before the chaotic system is used for information encryption. The next and most significant task is to build a system model through DSP-Builder software and generate chaotic signals using Field Programmable Gate Array chip. The results of oscilloscope consistent with numerical simulations, which lays the foundation for image and video streaming encryption. |
topic |
Computer-assisted proof fractional order liu System FPGA implementation topological horseshoe analysis |
url |
https://ieeexplore.ieee.org/document/8821275/ |
work_keys_str_mv |
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