TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems
Recently, high-performance embedded systems have adopted phase change memory (PCM) as their main memory because PCMs have attractive advantages, such as non-volatility, byte-addressability, high density, and low power consumption. However, PCMs have disadvantages, such as limited write endurance in...
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doaj-c1a4b8565bd347edbee9fac9522ae1332021-05-31T23:28:38ZengMDPI AGElectronics2079-92922021-05-01101111111110.3390/electronics10091111TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded SystemsJun Hyeong Choi0Kyung Min Kim1Jong Wook Kwak2Department of Computer Engineering, Yeungnam University, Gyeongsan 38541, KoreaDepartment of Computer Engineering, Yeungnam University, Gyeongsan 38541, KoreaDepartment of Computer Engineering, Yeungnam University, Gyeongsan 38541, KoreaRecently, high-performance embedded systems have adopted phase change memory (PCM) as their main memory because PCMs have attractive advantages, such as non-volatility, byte-addressability, high density, and low power consumption. However, PCMs have disadvantages, such as limited write endurance in each cell and high write latency compared to DRAMs. Therefore, researchers have investigated methods for enhancing the limitations of PCMs. In this paper, we propose a page replacement policy called tendency-aware CLOCK (TA-CLOCK) for the hybrid main memory of embedded systems. To improve the limited write endurance of PCMs, TA-CLOCK classifies the page access tendency of the victim page through access pattern analysis and determines the migration location of the victim page. Through the classification of the page access tendency, TA-CLOCK reduces unnecessary page migrations from DRAMs to PCMs. Unnecessary migrations cause an increase in write operations in PCMs and the energy consumption of the hybrid main memory in embedded systems. Thus, our proposed policy improves the limited write endurance of PCMs and enhances the access latency of the hybrid main memory of embedded systems by classifying the page access tendency. We compared the TA-CLOCK with existing page replacement policies to evaluate its performance. In our experiments, TA-CLOCK reduced the number of write operations in PCMs by 71.5% on average, and it enhanced the energy delay product by 38.3% on average compared with other page replacement policies.https://www.mdpi.com/2079-9292/10/9/1111non-volatile memoryphase change memoryhybrid main memorypage replacement policytendency classificationclock algorithm |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Jun Hyeong Choi Kyung Min Kim Jong Wook Kwak |
spellingShingle |
Jun Hyeong Choi Kyung Min Kim Jong Wook Kwak TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems Electronics non-volatile memory phase change memory hybrid main memory page replacement policy tendency classification clock algorithm |
author_facet |
Jun Hyeong Choi Kyung Min Kim Jong Wook Kwak |
author_sort |
Jun Hyeong Choi |
title |
TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems |
title_short |
TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems |
title_full |
TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems |
title_fullStr |
TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems |
title_full_unstemmed |
TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems |
title_sort |
ta-clock: tendency-aware page replacement policy for hybrid main memory in high-performance embedded systems |
publisher |
MDPI AG |
series |
Electronics |
issn |
2079-9292 |
publishDate |
2021-05-01 |
description |
Recently, high-performance embedded systems have adopted phase change memory (PCM) as their main memory because PCMs have attractive advantages, such as non-volatility, byte-addressability, high density, and low power consumption. However, PCMs have disadvantages, such as limited write endurance in each cell and high write latency compared to DRAMs. Therefore, researchers have investigated methods for enhancing the limitations of PCMs. In this paper, we propose a page replacement policy called tendency-aware CLOCK (TA-CLOCK) for the hybrid main memory of embedded systems. To improve the limited write endurance of PCMs, TA-CLOCK classifies the page access tendency of the victim page through access pattern analysis and determines the migration location of the victim page. Through the classification of the page access tendency, TA-CLOCK reduces unnecessary page migrations from DRAMs to PCMs. Unnecessary migrations cause an increase in write operations in PCMs and the energy consumption of the hybrid main memory in embedded systems. Thus, our proposed policy improves the limited write endurance of PCMs and enhances the access latency of the hybrid main memory of embedded systems by classifying the page access tendency. We compared the TA-CLOCK with existing page replacement policies to evaluate its performance. In our experiments, TA-CLOCK reduced the number of write operations in PCMs by 71.5% on average, and it enhanced the energy delay product by 38.3% on average compared with other page replacement policies. |
topic |
non-volatile memory phase change memory hybrid main memory page replacement policy tendency classification clock algorithm |
url |
https://www.mdpi.com/2079-9292/10/9/1111 |
work_keys_str_mv |
AT junhyeongchoi taclocktendencyawarepagereplacementpolicyforhybridmainmemoryinhighperformanceembeddedsystems AT kyungminkim taclocktendencyawarepagereplacementpolicyforhybridmainmemoryinhighperformanceembeddedsystems AT jongwookkwak taclocktendencyawarepagereplacementpolicyforhybridmainmemoryinhighperformanceembeddedsystems |
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