BSIM-CMG compact model for IC CAD: from FinFET to Gate-All-Around FET Technology
We discuss the BSIM-CMG compact model for SPICE simulations of any common multi-gate (CMG) device. This is an industry standard model which has been used extensively for FinFETs IC design and simulation, and has now been extended to accurately model gate-all-around FET (GAAFET). We present the core...
Main Authors: | Avirup Dasgupta, Chenming Hu |
---|---|
Format: | Article |
Language: | English |
Published: |
JommPublish
2020-12-01
|
Series: | Journal of Microelectronic Manufacturing |
Subjects: | |
Online Access: | http://www.jommpublish.org/p/59/ |
Similar Items
-
Analytical Modeling and Experimental Validation of Threshold Voltage in BSIM6 MOSFET Model
by: Harshit Agarwal, et al.
Published: (2015-01-01) -
GAAFET Versus Pragmatic FinFET at the 5nm Si-Based CMOS Technology Node
by: Ya-Chi Huang, et al.
Published: (2017-01-01) -
BSIM—SPICE Models Enable FinFET and UTB IC Designs
by: Navid Paydavosi, et al.
Published: (2013-01-01) -
Many-Tier Vertical GAAFET (V-FET) for Ultra-Miniaturized Standard Cell Designs Beyond 5 nm
by: Taigon Song
Published: (2020-01-01) -
Benchmarking of FinFET, Nanosheet, and Nanowire FET Architectures for Future Technology Nodes
by: Daniel Nagy, et al.
Published: (2020-01-01)