Instruction Scheduling Across Control Flow
Instruction scheduling algorithms are used in compilers to reduce run-time delays for the compiled code by the reordering or transformation of program statements, usually at the intermediate language or assembly code level. Considerable research has been carried out on scheduling code within the sco...
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doaj-b863057840db4936b1f9fcbb07e6ec302021-07-02T13:59:40ZengHindawi LimitedScientific Programming1058-92441875-919X1993-01-01231510.1155/1993/536143Instruction Scheduling Across Control FlowMartin Charles Golumbic0Vladimir Rainish1IBM Israel Science and Technology, MATAM-Advanced Technology Center, Haifa 31905, IsraelIBM Israel Science and Technology, MATAM-Advanced Technology Center, Haifa 31905, IsraelInstruction scheduling algorithms are used in compilers to reduce run-time delays for the compiled code by the reordering or transformation of program statements, usually at the intermediate language or assembly code level. Considerable research has been carried out on scheduling code within the scope of basic blocks, i.e., straight line sections of code, and very effective basic block schedulers are now included in most modern compilers and especially for pipeline processors. In previous work Golumbic and Rainis: IBM J. Res. Dev., Vol. 34, pp.93–97, 1990, we presented code replication techniques for scheduling beyond the scope of basic blocks that provide reasonable improvements of running time of the compiled code, but which still leaves room for further improvement. In this article we present a new method for scheduling beyond basic blocks called SHACOOF. This new technique takes advantage of a conventional, high quality basic block scheduler by first suppressing selected subsequences of instructions and then scheduling the modified sequence of instructions using the basic block scheduler. A candidate subsequence for suppression can be found by identifying a region of a program control flow graph, called an S-region, which has a unique entry and a unique exit and meets predetermined criteria. This enables scheduling of a sequence of instructions beyond basic block boundaries, with only minimal changes to an existing compiler, by identifying beneficial opportunities to cover delays that would otherwise have been beyond its scope.http://dx.doi.org/10.1155/1993/536143 |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Martin Charles Golumbic Vladimir Rainish |
spellingShingle |
Martin Charles Golumbic Vladimir Rainish Instruction Scheduling Across Control Flow Scientific Programming |
author_facet |
Martin Charles Golumbic Vladimir Rainish |
author_sort |
Martin Charles Golumbic |
title |
Instruction Scheduling Across Control Flow |
title_short |
Instruction Scheduling Across Control Flow |
title_full |
Instruction Scheduling Across Control Flow |
title_fullStr |
Instruction Scheduling Across Control Flow |
title_full_unstemmed |
Instruction Scheduling Across Control Flow |
title_sort |
instruction scheduling across control flow |
publisher |
Hindawi Limited |
series |
Scientific Programming |
issn |
1058-9244 1875-919X |
publishDate |
1993-01-01 |
description |
Instruction scheduling algorithms are used in compilers to reduce run-time delays for the compiled code by the reordering or transformation of program statements, usually at the intermediate language or assembly code level. Considerable research has been carried out on scheduling code within the scope of basic blocks, i.e., straight line sections of code, and very effective basic block schedulers are now included in most modern compilers and especially for pipeline processors. In previous work Golumbic and Rainis: IBM J. Res. Dev., Vol. 34, pp.93–97, 1990, we presented code replication techniques for scheduling beyond the scope of basic blocks that provide reasonable improvements of running time of the compiled code, but which still leaves room for further improvement. In this article we present a new method for scheduling beyond basic blocks called SHACOOF. This new technique takes advantage of a conventional, high quality basic block scheduler by first suppressing selected subsequences of instructions and then scheduling the modified sequence of instructions using the basic block scheduler. A candidate subsequence for suppression can be found by identifying a region of a program control flow graph, called an S-region, which has a unique entry and a unique exit and meets predetermined criteria. This enables scheduling of a sequence of instructions beyond basic block boundaries, with only minimal changes to an existing compiler, by identifying beneficial opportunities to cover delays that would otherwise have been beyond its scope. |
url |
http://dx.doi.org/10.1155/1993/536143 |
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