EFFECTIVE METHOD OF UNRELIABLE CMOS CIRCUTS IDENTIFICATION
With increase of complexity factor of integrated circuits and reduction of the geometrical dimensions of integrated structures and detection of unreliable circuits still remains an actual problem. A method of rejection of potentially unreliable circuits most often used in production is imitation of...
| Main Authors: | , |
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| Format: | Article |
| Language: | Russian |
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Educational institution «Belarusian State University of Informatics and Radioelectronics»
2019-06-01
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| Series: | Doklady Belorusskogo gosudarstvennogo universiteta informatiki i radioèlektroniki |
| Subjects: | |
| Online Access: | https://doklady.bsuir.by/jour/article/view/148 |
| Summary: | With increase of complexity factor of integrated circuits and reduction of the geometrical dimensions of integrated structures and detection of unreliable circuits still remains an actual problem. A method of rejection of potentially unreliable circuits most often used in production is imitation of operational modes at a stage of tests. However complexity and duration of realization of the specified method does it practically not suitable in the conditions of mass production of integrated circuits. |
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| ISSN: | 1729-7648 |