Scheme Topological Modeling of Converters Signal Levels for Analytical Microsystems-on-Chip
The results of scheme-topology design and computer modeling for signal level converter of integrated circuits and micro analysis on the basic matrix chip (BMK) with the structures "silicon-on-insulator" (SOI) are present in paper
Main Authors: | V. V. Dovgiy, I T. Kohut, V. I. Holota |
---|---|
Format: | Article |
Language: | English |
Published: |
Vasyl Stefanyk Precarpathian National University
2016-10-01
|
Series: | Фізика і хімія твердого тіла |
Online Access: | http://journals.pu.if.ua/index.php/pcss/article/view/809 |
Similar Items
-
Design and Simulation Elements of Analytical Microsystem-on-Chip With the Structures "Silicon-on-Insulator"
by: V. V. Dovgiy, et al.
Published: (2017-09-01) -
Schematic-Topological Modeling of the SOI CMOS Ring Oscillators for Sensor Microsystems on Chip
by: M. V. Kotyk, et al.
Published: (2019-01-01) -
Pyramidal micromirrors for microsystems and atom chips
by: Trupke, M., et al.
Published: (2006) -
Reliability Analysis of 3D Heterogeneous Integrated Microsystem Chip
by: Lu, Chun-Lin, et al.
Published: (2010) -
Novel microsystems for gradient generation in analytical instrumentation and measurement
by: Yusuf, Hayat Abdulla
Published: (2009)