Scheme Topological Modeling of Converters Signal Levels for Analytical Microsystems-on-Chip
The results of scheme-topology design and computer modeling for signal level converter of integrated circuits and micro analysis on the basic matrix chip (BMK) with the structures "silicon-on-insulator" (SOI) are present in paper
Main Authors: | , , |
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Format: | Article |
Language: | English |
Published: |
Vasyl Stefanyk Precarpathian National University
2016-10-01
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Series: | Фізика і хімія твердого тіла |
Online Access: | http://journals.pu.if.ua/index.php/pcss/article/view/809 |