Design and implementation of an all-digital timing recovery system for asynchronous communication

This work addresses the design and implementation of a timing recovery unit for a communication system with parallel reception, 4-PAM modulation, raised cosine filtering and a nominal sampling frequency of 1,1 GHz. The design of the building blocks within the system, as well as simulation results an...

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Main Authors:	José Jaime Valenciano-Rojas, Renato Rímolo-Donadio
Format:	Article
Language:	Spanish
Published:	Instituto Tecnológico de Costa Rica 2015-06-01
Series:	Tecnología en Marcha
Subjects:	Modulación 4-PAM procesamiento digital de señales recuperación de la temporización sistema de comunicación.
Online Access:	http://revistas.tec.ac.cr/index.php/tec_marcha/article/view/2332

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spelling	doaj-aa997d247c7846dc929dbf58d6e4fda92020-11-24T22:58:08ZspaInstituto Tecnológico de Costa RicaTecnología en Marcha0379-39822215-32412015-06-01282334310.18845/tm.v28i2.23322041Design and implementation of an all-digital timing recovery system for asynchronous communicationJosé Jaime Valenciano-RojasRenato Rímolo-DonadioThis work addresses the design and implementation of a timing recovery unit for a communication system with parallel reception, 4-PAM modulation, raised cosine filtering and a nominal sampling frequency of 1,1 GHz. The design of the building blocks within the system, as well as simulation results and the physical implementation in FPGA are discussed.http://revistas.tec.ac.cr/index.php/tec_marcha/article/view/2332Modulación 4-PAMprocesamiento digital de señalesrecuperación de la temporizaciónsistema de comunicación.
collection	DOAJ
language	Spanish
format	Article
sources	DOAJ
author	José Jaime Valenciano-Rojas Renato Rímolo-Donadio
spellingShingle	José Jaime Valenciano-Rojas Renato Rímolo-Donadio Design and implementation of an all-digital timing recovery system for asynchronous communication Tecnología en Marcha Modulación 4-PAM procesamiento digital de señales recuperación de la temporización sistema de comunicación.
author_facet	José Jaime Valenciano-Rojas Renato Rímolo-Donadio
author_sort	José Jaime Valenciano-Rojas
title	Design and implementation of an all-digital timing recovery system for asynchronous communication
title_short	Design and implementation of an all-digital timing recovery system for asynchronous communication
title_full	Design and implementation of an all-digital timing recovery system for asynchronous communication
title_fullStr	Design and implementation of an all-digital timing recovery system for asynchronous communication
title_full_unstemmed	Design and implementation of an all-digital timing recovery system for asynchronous communication
title_sort	design and implementation of an all-digital timing recovery system for asynchronous communication
publisher	Instituto Tecnológico de Costa Rica
series	Tecnología en Marcha
issn	0379-3982 2215-3241
publishDate	2015-06-01
description	This work addresses the design and implementation of a timing recovery unit for a communication system with parallel reception, 4-PAM modulation, raised cosine filtering and a nominal sampling frequency of 1,1 GHz. The design of the building blocks within the system, as well as simulation results and the physical implementation in FPGA are discussed.
topic	Modulación 4-PAM procesamiento digital de señales recuperación de la temporización sistema de comunicación.
url	http://revistas.tec.ac.cr/index.php/tec_marcha/article/view/2332
work_keys_str_mv	AT josejaimevalencianorojas designandimplementationofanalldigitaltimingrecoverysystemforasynchronouscommunication AT renatorimolodonadio designandimplementationofanalldigitaltimingrecoverysystemforasynchronouscommunication
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Design and implementation of an all-digital timing recovery system for asynchronous communication

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