Design and implementation of an all-digital timing recovery system for asynchronous communication

Design and implementation of an all-digital timing recovery system for asynchronous communication

This work addresses the design and implementation of a timing recovery unit for a communication system with parallel reception, 4-PAM modulation, raised cosine filtering and a nominal sampling frequency of 1,1 GHz. The design of the building blocks within the system, as well as simulation results an...

Full description

Bibliographic Details
Main Authors: José Jaime Valenciano-Rojas, Renato Rímolo-Donadio
Format: Article
Language:Spanish
Published: Instituto Tecnológico de Costa Rica 2015-06-01
Series:Tecnología en Marcha
Subjects:
Modulación 4-PAM
procesamiento digital de señales
recuperación de la temporización
sistema de comunicación.
Online Access:http://revistas.tec.ac.cr/index.php/tec_marcha/article/view/2332
Description
Summary:This work addresses the design and implementation of a timing recovery unit for a communication system with parallel reception, 4-PAM modulation, raised cosine filtering and a nominal sampling frequency of 1,1 GHz. The design of the building blocks within the system, as well as simulation results and the physical implementation in FPGA are discussed.
ISSN:0379-3982
2215-3241

Similar Items