Speeding Up the Write Operation for Multi-Level Cell Phase Change Memory with Programmable Ramp-Down Current Pulses

Speeding Up the Write Operation for Multi-Level Cell Phase Change Memory with Programmable Ramp-Down Current Pulses

Multi-level cell (MLC) phase change memory (PCM) can not only effectively multiply the memory capacity while maintaining the cell area, but also has infinite potential in the application of the artificial neural network. The write and verify scheme is usually adopted to reduce the impact of device-t...

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Main Authors: Chenchen Xie, Xi Li, Houpeng Chen, Yang Li, Yuanguang Liu, Qian Wang, Kun Ren, Zhitang Song
Format: Article
Language:English
Published: MDPI AG 2019-07-01
Series:Micromachines
Subjects:
multi-level cell
phase change memory
programmable ramp-down current pulses
Online Access:https://www.mdpi.com/2072-666X/10/7/461
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spelling doaj-a5f39b08acbf4f6aa5a9c02df65167032020-11-25T00:42:41ZengMDPI AGMicromachines2072-666X2019-07-0110746110.3390/mi10070461mi10070461Speeding Up the Write Operation for Multi-Level Cell Phase Change Memory with Programmable Ramp-Down Current PulsesChenchen Xie0Xi Li1Houpeng Chen2Yang Li3Yuanguang Liu4Qian Wang5Kun Ren6Zhitang Song7Schools of Microelectronics, University of Chinese Academy of Sciences, Beijing 100049, ChinaState Key Laboratory of Functional Materials for Informatics; Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, ChinaState Key Laboratory of Functional Materials for Informatics; Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, ChinaSchools of Microelectronics, University of Chinese Academy of Sciences, Beijing 100049, ChinaSchools of Microelectronics, University of Chinese Academy of Sciences, Beijing 100049, ChinaState Key Laboratory of Functional Materials for Informatics; Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, ChinaState Key Laboratory of Functional Materials for Informatics; Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, ChinaState Key Laboratory of Functional Materials for Informatics; Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, ChinaMulti-level cell (MLC) phase change memory (PCM) can not only effectively multiply the memory capacity while maintaining the cell area, but also has infinite potential in the application of the artificial neural network. The write and verify scheme is usually adopted to reduce the impact of device-to-device variability at the expense of a greater operation time and more power consumption. This paper proposes a novel write operation for multi-level cell phase change memory: Programmable ramp-down current pulses are utilized to program the RESET initialized memory cells to the expected resistance levels. In addition, a fully differential read circuit with an optional reference current source is employed to complete the readout operation. Eventually, a 2-bit/cell phase change memory chip is presented with a more efficient write operation of a single current pulse and a read access time of 65 ns. Some experiments are implemented to demonstrate the resistance distribution and the drift.https://www.mdpi.com/2072-666X/10/7/461multi-level cellphase change memoryprogrammable ramp-down current pulses
collection DOAJ
language English
format Article
sources DOAJ
author Chenchen Xie
Xi Li
Houpeng Chen
Yang Li
Yuanguang Liu
Qian Wang
Kun Ren
Zhitang Song
spellingShingle Chenchen Xie
Xi Li
Houpeng Chen
Yang Li
Yuanguang Liu
Qian Wang
Kun Ren
Zhitang Song
Speeding Up the Write Operation for Multi-Level Cell Phase Change Memory with Programmable Ramp-Down Current Pulses
Micromachines
multi-level cell
phase change memory
programmable ramp-down current pulses
author_facet Chenchen Xie
Xi Li
Houpeng Chen
Yang Li
Yuanguang Liu
Qian Wang
Kun Ren
Zhitang Song
author_sort Chenchen Xie
title Speeding Up the Write Operation for Multi-Level Cell Phase Change Memory with Programmable Ramp-Down Current Pulses
title_short Speeding Up the Write Operation for Multi-Level Cell Phase Change Memory with Programmable Ramp-Down Current Pulses
title_full Speeding Up the Write Operation for Multi-Level Cell Phase Change Memory with Programmable Ramp-Down Current Pulses
title_fullStr Speeding Up the Write Operation for Multi-Level Cell Phase Change Memory with Programmable Ramp-Down Current Pulses
title_full_unstemmed Speeding Up the Write Operation for Multi-Level Cell Phase Change Memory with Programmable Ramp-Down Current Pulses
title_sort speeding up the write operation for multi-level cell phase change memory with programmable ramp-down current pulses
publisher MDPI AG
series Micromachines
issn 2072-666X
publishDate 2019-07-01
description Multi-level cell (MLC) phase change memory (PCM) can not only effectively multiply the memory capacity while maintaining the cell area, but also has infinite potential in the application of the artificial neural network. The write and verify scheme is usually adopted to reduce the impact of device-to-device variability at the expense of a greater operation time and more power consumption. This paper proposes a novel write operation for multi-level cell phase change memory: Programmable ramp-down current pulses are utilized to program the RESET initialized memory cells to the expected resistance levels. In addition, a fully differential read circuit with an optional reference current source is employed to complete the readout operation. Eventually, a 2-bit/cell phase change memory chip is presented with a more efficient write operation of a single current pulse and a read access time of 65 ns. Some experiments are implemented to demonstrate the resistance distribution and the drift.
topic multi-level cell
phase change memory
programmable ramp-down current pulses
url https://www.mdpi.com/2072-666X/10/7/461
work_keys_str_mv AT chenchenxie speedingupthewriteoperationformultilevelcellphasechangememorywithprogrammablerampdowncurrentpulses
AT xili speedingupthewriteoperationformultilevelcellphasechangememorywithprogrammablerampdowncurrentpulses
AT houpengchen speedingupthewriteoperationformultilevelcellphasechangememorywithprogrammablerampdowncurrentpulses
AT yangli speedingupthewriteoperationformultilevelcellphasechangememorywithprogrammablerampdowncurrentpulses
AT yuanguangliu speedingupthewriteoperationformultilevelcellphasechangememorywithprogrammablerampdowncurrentpulses
AT qianwang speedingupthewriteoperationformultilevelcellphasechangememorywithprogrammablerampdowncurrentpulses
AT kunren speedingupthewriteoperationformultilevelcellphasechangememorywithprogrammablerampdowncurrentpulses
AT zhitangsong speedingupthewriteoperationformultilevelcellphasechangememorywithprogrammablerampdowncurrentpulses
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