Deep Neural Network Hardware Implementation Based on Stacked Sparse Autoencoder

Deep Neural Network Hardware Implementation Based on Stacked Sparse Autoencoder

Deep learning techniques have been gaining prominence in the research world in the past years; however, the deep learning algorithms have high computational cost, making them hard to be used to several commercial applications. On the other hand, new alternatives have been studied and some methodolog...

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Bibliographic Details
Main Authors: Maria G. F. Coutinho, Matheus F. Torquato, Marcelo A. C. Fernandes
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Access
Subjects:
Deep learning
stacked sparse autoencoder
FPGA
systolic array
Online Access:https://ieeexplore.ieee.org/document/8678408/

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