Conceptualization and Analysis of a Next-Generation Ultra-Compact 1.5-kW PCB-Integrated Wide-Input-Voltage-Range 12V-Output Industrial DC/DC Converter Module

The next-generation industrial environment requires power supplies that are compact, efficient, low-cost, and ultra-reliable, even across mains failures, to power mission-critical electrified processes. Hold-up time requirements and the demand for ultra-high power density and minimum production cost...

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Bibliographic Details
Main Authors: Gustavo C. Knabben, Grayson Zulauf, Jannik Schäfer, Johann W. Kolar, Matthias J. Kasper, Jon Azurza Anderson, Gerald Deboy
Format: Article
Language:English
Published: MDPI AG 2021-09-01
Series:Electronics
Subjects:
LLC
Online Access:https://www.mdpi.com/2079-9292/10/17/2158
Description
Summary:The next-generation industrial environment requires power supplies that are compact, efficient, low-cost, and ultra-reliable, even across mains failures, to power mission-critical electrified processes. Hold-up time requirements and the demand for ultra-high power density and minimum production costs, in particular, drive the need for power converters with (i) a wide input voltage range, to reduce the size of the hold-up capacitor, (ii) soft-switching over the full input voltage and load ranges, to achieve low losses that facilitate a compact realization, and (iii) complete PCB-integration for low-cost manufacturing. In this work, we conceptualize, design, model, fabricate, and characterize a <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mn>1.5</mn></mrow></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">k</mi></semantics></math></inline-formula><inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">W</mi></semantics></math></inline-formula>, 12 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">V</mi></semantics></math></inline-formula>-output DC/DC converter for industrial power supplies that is required to operate across a wide 300 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">V</mi></semantics></math></inline-formula>–430 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">V</mi></semantics></math></inline-formula> input voltage range. This module utilizes an LLC-based control scheme for complete soft-switching and a snake-core transformer to divide the output current with a balanced flux among multiple secondary windings. Detailed loss models are derived for every component in the converter. The converter achieves close to 96% peak efficiency with a power density of 337 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">W</mi></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msup><mi>in</mi><mrow><mo>−</mo><mn>3</mn></mrow></msup></semantics></math></inline-formula> (<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mn>20.6</mn></mrow></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">k</mi></semantics></math></inline-formula><inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">W</mi></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msup><mrow><mi mathvariant="normal">d</mi><mi mathvariant="normal">m</mi></mrow><mrow><mo>−</mo><mn>3</mn></mrow></msup></semantics></math></inline-formula>), excellent matching to the derived loss models, and zero-voltage switching even down to zero load. The loss models are used to identify improvements to further boost efficiency, the most important of which is the minimization of delay times in synchronous rectification, and a subsequent improved <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mn>1.5</mn></mrow></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">k</mi></semantics></math></inline-formula><inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">W</mi></semantics></math></inline-formula> hardware module eliminates nearly 25% of converter losses for a peak efficiency of nearly 97% with a power density of 308 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">W</mi></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msup><mi>in</mi><mrow><mo>−</mo><mn>3</mn></mrow></msup></semantics></math></inline-formula> (<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mn>18.8</mn></mrow></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">k</mi></semantics></math></inline-formula><inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">W</mi></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msup><mi>dm</mi><mrow><mo>−</mo><mn>3</mn></mrow></msup></semantics></math></inline-formula>). Two <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mn>1.5</mn></mrow></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">k</mi></semantics></math></inline-formula><inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">W</mi></semantics></math></inline-formula> modules are then paralleled to achieve 3 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">k</mi></semantics></math></inline-formula><inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">W</mi></semantics></math></inline-formula> output power at 12 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">V</mi></semantics></math></inline-formula> and 345 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">W</mi></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msup><mi>in</mi><mrow><mo>−</mo><mn>3</mn></mrow></msup></semantics></math></inline-formula> (<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mn>21.1</mn></mrow></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">k</mi></semantics></math></inline-formula><inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="normal">W</mi></semantics></math></inline-formula> <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msup><mi>dm</mi><mrow><mo>−</mo><mn>3</mn></mrow></msup></semantics></math></inline-formula>) with ideal current sharing between the secondary outputs and no drop in efficiency from a single module, an important characteristic enabled by the novel snake-core transformer.
ISSN:2079-9292