Two-port equivalent circuit model for UHVDC converter valves

• Main Authors: Ning Chen, Lei Qi, Yi Tang, Cuiyu Zhao, Xiang Cui, Chong Gao
• Format: Article
• Language: English
• Published: China electric power research institute 2019-03-01
• Series: CSEE Journal of Power and Energy Systems
• Online Access: https://ieeexplore.ieee.org/document/8661895
• ISSN: 2096-0042; 2096-0042

UHVDC converter valves during operation may experience overvoltage, which come from the AC or DC systems to which they are connected. Therefore, building an equivalent circuit model (ECM) for the converter valve to analyze the interlayer transient voltage distribution characteristics has important engineering significance for safe and reasonable voltage equalization methods and improving the stability of the DC system. This paper proposes a two-port equivalent circuit model for ±1100 kV converter valve based on the structure of the valve and parameter extraction methods presented. In terms of lumped parameters, integrated ECMs for valve layers are built through impedance-frequency characteristic analysis; in terms of parasitic capacitance parameters, port equivalent parasitic capacitance parameters are obtained by terminal capacitance method and iterative equivalence methods proposed in this paper. By combining integrated ECMs of valve layers and port equivalent parasitic capacitances, the two-port ECM is obtained. Simulations are carried out to test the effectiveness of the two-port ECM. Using the ECM, the voltage transmission characteristics and their influencing factors are analyzed, depending on which corresponding voltage equalization method is proposed in this paper, and the effect of this method is verified through simulation.