Low-Voltage 0.81mW, 1–32 CMOS VGA With 5% Bandwidth Variations and −38dB DC Rejection
A CMOS low-voltage amplifier with approximately constant bandwidth and DC rejection is introduced. The design is based on the cascade of a wide linear input range OTA, an op-amp and a servo-loop with extremely large time constants. It operates with ±0.45V supplies and a power consumption...
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IEEE
2020-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/9104982/ |
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doaj-8f2e8cac7f5b4b85a0ba38d292b56d292021-03-30T02:04:55ZengIEEEIEEE Access2169-35362020-01-01810631010632110.1109/ACCESS.2020.29993159104982Low-Voltage 0.81mW, 1–32 CMOS VGA With 5% Bandwidth Variations and −38dB DC RejectionHector Daniel Rico-Aniles0https://orcid.org/0000-0003-2483-9428Jaime Ramirez-Angulo1Jose Miguel Rocha-Perez2Antonio J. Lopez-Martin3Ramon Gonzalez Carvajal4Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM, USAKlipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM, USANational Institute of Astrophysics, Optics and Electronics, Puebla, MexicoSmart Cities Institute, Public University of Navarre, Pamplona, SpainElectronics Department, University of Seville, Seville, SpainA CMOS low-voltage amplifier with approximately constant bandwidth and DC rejection is introduced. The design is based on the cascade of a wide linear input range OTA, an op-amp and a servo-loop with extremely large time constants. It operates with ±0.45V supplies and a power consumption of 0.81mW in 180nm technology. The bandwidth changes only from 9.08MHz to 9.54MHz over a gain range from 1 to 32, it has a 9.8Hz low cutoff frequency and a DC attenuation of 38dBs. DC floating voltage sources are used to keep the gates of all differential pairs at a constant value close to a supply rail in order to operate the amplifier circuit with minimum supply voltage. The proposed circuit has small and large signal figures of merit FOM<sub>SS</sub> = 5380 (MHz*pF/mW) and FOM<sub>LS</sub> = 0.0085((V/ns)*pF/mA) for a nominal gain A = 32.https://ieeexplore.ieee.org/document/9104982/Low-voltagelow powerCMOS amplifierstransresistance amplifierlinear transconductors |
| collection |
DOAJ |
| language |
English |
| format |
Article |
| sources |
DOAJ |
| author |
Hector Daniel Rico-Aniles Jaime Ramirez-Angulo Jose Miguel Rocha-Perez Antonio J. Lopez-Martin Ramon Gonzalez Carvajal |
| spellingShingle |
Hector Daniel Rico-Aniles Jaime Ramirez-Angulo Jose Miguel Rocha-Perez Antonio J. Lopez-Martin Ramon Gonzalez Carvajal Low-Voltage 0.81mW, 1–32 CMOS VGA With 5% Bandwidth Variations and −38dB DC Rejection IEEE Access Low-voltage low power CMOS amplifiers transresistance amplifier linear transconductors |
| author_facet |
Hector Daniel Rico-Aniles Jaime Ramirez-Angulo Jose Miguel Rocha-Perez Antonio J. Lopez-Martin Ramon Gonzalez Carvajal |
| author_sort |
Hector Daniel Rico-Aniles |
| title |
Low-Voltage 0.81mW, 1–32 CMOS VGA With 5% Bandwidth Variations and −38dB DC Rejection |
| title_short |
Low-Voltage 0.81mW, 1–32 CMOS VGA With 5% Bandwidth Variations and −38dB DC Rejection |
| title_full |
Low-Voltage 0.81mW, 1–32 CMOS VGA With 5% Bandwidth Variations and −38dB DC Rejection |
| title_fullStr |
Low-Voltage 0.81mW, 1–32 CMOS VGA With 5% Bandwidth Variations and −38dB DC Rejection |
| title_full_unstemmed |
Low-Voltage 0.81mW, 1–32 CMOS VGA With 5% Bandwidth Variations and −38dB DC Rejection |
| title_sort |
low-voltage 0.81mw, 1–32 cmos vga with 5% bandwidth variations and −38db dc rejection |
| publisher |
IEEE |
| series |
IEEE Access |
| issn |
2169-3536 |
| publishDate |
2020-01-01 |
| description |
A CMOS low-voltage amplifier with approximately constant bandwidth and DC rejection is introduced. The design is based on the cascade of a wide linear input range OTA, an op-amp and a servo-loop with extremely large time constants. It operates with ±0.45V supplies and a power consumption of 0.81mW in 180nm technology. The bandwidth changes only from 9.08MHz to 9.54MHz over a gain range from 1 to 32, it has a 9.8Hz low cutoff frequency and a DC attenuation of 38dBs. DC floating voltage sources are used to keep the gates of all differential pairs at a constant value close to a supply rail in order to operate the amplifier circuit with minimum supply voltage. The proposed circuit has small and large signal figures of merit FOM<sub>SS</sub> = 5380 (MHz*pF/mW) and FOM<sub>LS</sub> = 0.0085((V/ns)*pF/mA) for a nominal gain A = 32. |
| topic |
Low-voltage low power CMOS amplifiers transresistance amplifier linear transconductors |
| url |
https://ieeexplore.ieee.org/document/9104982/ |
| work_keys_str_mv |
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