DESIGN OF A HIGH-SPEED, RECONFIGURABLE, DIGITAL RANK ORDER FILTER

A new architecture to realize a modular, high-speed, reconfigurable, digital Rank Order Filter (ROF) is presented in this paper. A bit-level algorithm by Kar and Pradhan has been modified in this work to implement the proposed ROF. Using the proposed digital rank selection circuit it is possible...

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Bibliographic Details
Main Authors: George John Toscano, Pran K. Saha, A.H.M Zahirul Alam
Format: Article
Language:English
Published: IIUM Press, International Islamic University Malaysia 2010-09-01
Series:International Islamic University Malaysia Engineering Journal
Online Access:http://journals.iium.edu.my/ejournal/index.php/iiumej/article/view/102

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