POWER DRIVEN SYNTHESIS OF COMBINATIONAL CIRCUITS ON THE BASE OF CMOS VLSI LIBRARY ELEMENTS

POWER DRIVEN SYNTHESIS OF COMBINATIONAL CIRCUITS ON THE BASE OF CMOS VLSI LIBRARY ELEMENTS

A problem of synthesis of multi-level logical networks using CMOS VLSI cell library is considered. The networks are optimized with respect to the die size and average dissipated power by CMOS-circuit implemented on a VLSI chip. The suggested approach is based on covering multilevel gate network and...

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Bibliographic Details
Main Authors:	D. I. Cheremisinov, L. D. Cheremisinova
Format:	Article
Language:	Russian
Published:	The United Institute of Informatics Problems of the National Academy of Sciences of Belarus 2016-10-01
Series:	Informatika
Online Access:	https://inf.grid.by/jour/article/view/112

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