Signal acquisition and processing system based on zynq dual core

In order to speed up the acquisition and processing of signal, this paper has developed a signal acquisition and processing system based on zynq platform. Based on the ARM Cortex-A9 dual-core and editable logic unit architecture of Zynq AP SoC platform, this paper implements a fully functional signa...

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Main Authors: Tan Jingjia, He Lesheng, Wang Jun
Format: Article
Language:English
Published: EDP Sciences 2018-01-01
Series:MATEC Web of Conferences
Online Access:https://doi.org/10.1051/matecconf/201824603001
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spelling doaj-8b6d5f705e8a4ddb8f048a4afb2f6aec2021-03-02T11:06:57ZengEDP SciencesMATEC Web of Conferences2261-236X2018-01-012460300110.1051/matecconf/201824603001matecconf_iswso2018_03001Signal acquisition and processing system based on zynq dual coreTan Jingjia0He Lesheng1Wang Jun2School of information, Yunnan UniversitySchool of information, Yunnan UniversitySchool of information, Yunnan UniversityIn order to speed up the acquisition and processing of signal, this paper has developed a signal acquisition and processing system based on zynq platform. Based on the ARM Cortex-A9 dual-core and editable logic unit architecture of Zynq AP SoC platform, this paper implements a fully functional signal acquisition and processing system by software and hardware collaborative design. ARM0 is the main processor that controls system and shared resources. ARM1 is the slave processor. ARM1 is responsible for receiving the data converted by the AD7606 analog-to-digital chip. The data is sent to the Hamming window function IP core created under vivado HLS through the AXI bus. After the data is processed by Hamming window function, it is sent to ARM1 again through AXI bus. OCM acts as the shared memory for ARM0 and ARM1 communication. The Linux system runs on ARM0. The processed data is sent to the upper computer through ethernet through UDP protocol. Utilizing the architecture of the Zynq platform, the system efficiency is improved, and the stability of the system is ensured, so that the FPGA can enter the field of embedded systems.https://doi.org/10.1051/matecconf/201824603001
collection DOAJ
language English
format Article
sources DOAJ
author Tan Jingjia
He Lesheng
Wang Jun
spellingShingle Tan Jingjia
He Lesheng
Wang Jun
Signal acquisition and processing system based on zynq dual core
MATEC Web of Conferences
author_facet Tan Jingjia
He Lesheng
Wang Jun
author_sort Tan Jingjia
title Signal acquisition and processing system based on zynq dual core
title_short Signal acquisition and processing system based on zynq dual core
title_full Signal acquisition and processing system based on zynq dual core
title_fullStr Signal acquisition and processing system based on zynq dual core
title_full_unstemmed Signal acquisition and processing system based on zynq dual core
title_sort signal acquisition and processing system based on zynq dual core
publisher EDP Sciences
series MATEC Web of Conferences
issn 2261-236X
publishDate 2018-01-01
description In order to speed up the acquisition and processing of signal, this paper has developed a signal acquisition and processing system based on zynq platform. Based on the ARM Cortex-A9 dual-core and editable logic unit architecture of Zynq AP SoC platform, this paper implements a fully functional signal acquisition and processing system by software and hardware collaborative design. ARM0 is the main processor that controls system and shared resources. ARM1 is the slave processor. ARM1 is responsible for receiving the data converted by the AD7606 analog-to-digital chip. The data is sent to the Hamming window function IP core created under vivado HLS through the AXI bus. After the data is processed by Hamming window function, it is sent to ARM1 again through AXI bus. OCM acts as the shared memory for ARM0 and ARM1 communication. The Linux system runs on ARM0. The processed data is sent to the upper computer through ethernet through UDP protocol. Utilizing the architecture of the Zynq platform, the system efficiency is improved, and the stability of the system is ensured, so that the FPGA can enter the field of embedded systems.
url https://doi.org/10.1051/matecconf/201824603001
work_keys_str_mv AT tanjingjia signalacquisitionandprocessingsystembasedonzynqdualcore
AT helesheng signalacquisitionandprocessingsystembasedonzynqdualcore
AT wangjun signalacquisitionandprocessingsystembasedonzynqdualcore
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