Effect of indium low doping in ZnO based TFTs on electrical parameters and bias stress stability

• Main Authors: Alexander B. Cheremisin, Sergey N. Kuznetsov, Genrikh B. Stefanovich
• Format: Article
• Language: English
• Published: AIP Publishing LLC 2015-11-01
• Series: AIP Advances
• Online Access: http://dx.doi.org/10.1063/1.4935789

Some applications of thin film transistors (TFTs) need the bottom-gate architecture and unpassivated channel backside. We propose a simple routine to fabricate indium doped ZnO-based TFT with satisfactory characteristics and acceptable stability against a bias stress in ambient room air. To this end, a channel layer of 15 nm in thickness was deposited on cold substrate by DC reactive magnetron co-sputtering of metal Zn-In target. It is demonstrated that the increase of In concentration in ZnO matrix up to 5% leads to negative threshold voltage (VT) shift and an increase of field effect mobility (μ) and a decrease of subthreshold swing (SS). When dopant concentration reaches the upper level of 5% the best TFT parameters are achieved such as VT = 3.6 V, μ = 15.2 cm2/V s, SS = 0.5 V/dec. The TFTs operate in enhancement mode exhibiting high turn on/turn off current ratio more than 106. It is shown that the oxidative post-fabrication annealing at 250oC in pure oxygen and next ageing in dry air for several hours provide highly stable operational characteristics under negative and positive bias stresses despite open channel backside. A possible cause of this effect is discussed.