On Improving the Performance of Dynamic DCVSL Circuits
This contribution aims at improving the performance of Dynamic Differential Cascode Voltage Switch Logic (Dy-DCVSL) and Enhanced Dynamic Differential Cascode Voltage Switch Logic (EDCVSL) and suggests three architectures for the same. The first architecture uses transmission gates (TG) to reduce the...
Main Authors: | Pratibha Bajpai, Neeta Pandey, Kirti Gupta, Shrey Bagga, Jeebananda Panda |
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Format: | Article |
Language: | English |
Published: |
Hindawi Limited
2017-01-01
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Series: | Journal of Electrical and Computer Engineering |
Online Access: | http://dx.doi.org/10.1155/2017/8207104 |
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