Theoretical analysis and design of double implanted MOSFET on 6H silicon carbide wafer for low power dissipation and large breakdown voltage

This paper analyses the device structure of a 6H-SiC vertical double-implanted MOSFET (DIMOSFET) in order to provide a high breakdown voltage of about 10 kV and a low power dissipation for a rise in device temperature of 600 oC. Analysis of an 800 W power dissipation for stable device operation corr...

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Bibliographic Details
Main Author: Munish Vashishath
Format: Article
Language:English
Published: Maejo University 2008-05-01
Series:Maejo International Journal of Science and Technology
Subjects:
Online Access:http://www.mijst.mju.ac.th/vol2/308-319.pdf
Description
Summary:This paper analyses the device structure of a 6H-SiC vertical double-implanted MOSFET (DIMOSFET) in order to provide a high breakdown voltage of about 10 kV and a low power dissipation for a rise in device temperature of 600 oC. Analysis of an 800 W power dissipation for stable device operation corresponding to this temperature rise shows optimum doping levels of the drift region lying between 5*1013 cm-3 and 5*1015 cm-3 for a breakdown voltage of 10 kV.
ISSN:1905-7873