An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation

This paper presents a method for preventing output level distortion while matching the channel impedance in the single-ended PAM-4 transmitter for memory interfaces. ZQ codes for all four output signal levels were obtained through ZQ calibration and saved in the ZQ code table. The ZQ code generator...

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Main Authors: Changho Hyun, Yong-Un Jeong, Suhwan Kim, Joo-Hyung Chae
Format: Article
Language:English
Published: MDPI AG 2021-07-01
Series:Electronics
Subjects:
Online Access:https://www.mdpi.com/2079-9292/10/15/1768
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spelling doaj-80095262d50b489bb26f62051b0037e62021-08-06T15:21:04ZengMDPI AGElectronics2079-92922021-07-01101768176810.3390/electronics10151768An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level CompensationChangho Hyun0Yong-Un Jeong1Suhwan Kim2Joo-Hyung Chae3Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, KoreaDepartment of Electrical and Computer Engineering, Seoul National University, Seoul 08826, KoreaDepartment of Electrical and Computer Engineering, Seoul National University, Seoul 08826, KoreaDepartment of Electronics and Communications Engineering, Kwangwoon University, Seoul 01897, KoreaThis paper presents a method for preventing output level distortion while matching the channel impedance in the single-ended PAM-4 transmitter for memory interfaces. ZQ codes for all four output signal levels were obtained through ZQ calibration and saved in the ZQ code table. The ZQ code generator then adaptively selected the appropriate codes depending on the data pattern and delivered them to the output driver; this can improve the level separation mismatch ratio (RLM) while matching the channel impedance. To validate the effectiveness of our approach, a prototype chip with an active area of 0.035 mm<sup>2</sup> was fabricated in a 65 nm CMOS process. It achieved the energy efficiency of 3.09 pJ/bit/pin at 18 Gb/s/pin, and its RLM was 0.971 while matching the channel impedance.https://www.mdpi.com/2079-9292/10/15/1768single-ended signalingtransmitterfour-level pulse amplitude modulation (PAM-4)impedance matchinglevel separation mismatch ratio (RLM)memory interface
collection DOAJ
language English
format Article
sources DOAJ
author Changho Hyun
Yong-Un Jeong
Suhwan Kim
Joo-Hyung Chae
spellingShingle Changho Hyun
Yong-Un Jeong
Suhwan Kim
Joo-Hyung Chae
An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation
Electronics
single-ended signaling
transmitter
four-level pulse amplitude modulation (PAM-4)
impedance matching
level separation mismatch ratio (RLM)
memory interface
author_facet Changho Hyun
Yong-Un Jeong
Suhwan Kim
Joo-Hyung Chae
author_sort Changho Hyun
title An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation
title_short An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation
title_full An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation
title_fullStr An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation
title_full_unstemmed An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation
title_sort 18-gb/s/pin single-ended pam-4 transmitter for memory interfaces with adaptive impedance matching and output level compensation
publisher MDPI AG
series Electronics
issn 2079-9292
publishDate 2021-07-01
description This paper presents a method for preventing output level distortion while matching the channel impedance in the single-ended PAM-4 transmitter for memory interfaces. ZQ codes for all four output signal levels were obtained through ZQ calibration and saved in the ZQ code table. The ZQ code generator then adaptively selected the appropriate codes depending on the data pattern and delivered them to the output driver; this can improve the level separation mismatch ratio (RLM) while matching the channel impedance. To validate the effectiveness of our approach, a prototype chip with an active area of 0.035 mm<sup>2</sup> was fabricated in a 65 nm CMOS process. It achieved the energy efficiency of 3.09 pJ/bit/pin at 18 Gb/s/pin, and its RLM was 0.971 while matching the channel impedance.
topic single-ended signaling
transmitter
four-level pulse amplitude modulation (PAM-4)
impedance matching
level separation mismatch ratio (RLM)
memory interface
url https://www.mdpi.com/2079-9292/10/15/1768
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