Hybrid Design, Modelling, and Simulation of a 4-Bit Binary Multiplier using Vivado, Simulink, and Kintex-7 FPGA

Hybrid Design, Modelling, and Simulation of a 4-Bit Binary Multiplier using Vivado, Simulink, and Kintex-7 FPGA

The design of binary multipliers is a critical aspect of any reliable hardware in computing and computer engineering. In this paper, the design of a 4 bit binary multiplier has been undertaken, starting with a review of the importance of binary multipliers and wide areas of application. The paper th...

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Bibliographic Details
Main Authors: P. Y. Dibal, C. U. Ngene
Format: Article
Language:English
Published: University of Maiduguri 2015-08-01
Series:Arid Zone Journal of Engineering, Technology and Environment
Online Access:http://azojete.com.ng/index.php/azojete/article/view/116/106
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spelling doaj-7e1ed3cd9fcd402cbc51287f641b2ab82020-11-25T02:09:33ZengUniversity of MaiduguriArid Zone Journal of Engineering, Technology and Environment2545-58182545-58182015-08-0111114119Hybrid Design, Modelling, and Simulation of a 4-Bit Binary Multiplier using Vivado, Simulink, and Kintex-7 FPGAP. Y. DibalC. U. NgeneThe design of binary multipliers is a critical aspect of any reliable hardware in computing and computer engineering. In this paper, the design of a 4 bit binary multiplier has been undertaken, starting with a review of the importance of binary multipliers and wide areas of application. The paper then presents the multiplication methodology which involves an accumulator, a full adder, and a control circuit. The accumulator and full adder were designed using VHDL in the Vivado IDE, whereas the control circuit was modelled using the powerful technique of State flow in Simulink. The 4 bit binary multiplier is then modelled and simulated using the combination of Simulink and VHDL. Results obtained from the simulation verified the accuracy of the design methodology.http://azojete.com.ng/index.php/azojete/article/view/116/106
collection DOAJ
language English
format Article
sources DOAJ
author P. Y. Dibal
C. U. Ngene
spellingShingle P. Y. Dibal
C. U. Ngene
Hybrid Design, Modelling, and Simulation of a 4-Bit Binary Multiplier using Vivado, Simulink, and Kintex-7 FPGA
Arid Zone Journal of Engineering, Technology and Environment
author_facet P. Y. Dibal
C. U. Ngene
author_sort P. Y. Dibal
title Hybrid Design, Modelling, and Simulation of a 4-Bit Binary Multiplier using Vivado, Simulink, and Kintex-7 FPGA
title_short Hybrid Design, Modelling, and Simulation of a 4-Bit Binary Multiplier using Vivado, Simulink, and Kintex-7 FPGA
title_full Hybrid Design, Modelling, and Simulation of a 4-Bit Binary Multiplier using Vivado, Simulink, and Kintex-7 FPGA
title_fullStr Hybrid Design, Modelling, and Simulation of a 4-Bit Binary Multiplier using Vivado, Simulink, and Kintex-7 FPGA
title_full_unstemmed Hybrid Design, Modelling, and Simulation of a 4-Bit Binary Multiplier using Vivado, Simulink, and Kintex-7 FPGA
title_sort hybrid design, modelling, and simulation of a 4-bit binary multiplier using vivado, simulink, and kintex-7 fpga
publisher University of Maiduguri
series Arid Zone Journal of Engineering, Technology and Environment
issn 2545-5818
2545-5818
publishDate 2015-08-01
description The design of binary multipliers is a critical aspect of any reliable hardware in computing and computer engineering. In this paper, the design of a 4 bit binary multiplier has been undertaken, starting with a review of the importance of binary multipliers and wide areas of application. The paper then presents the multiplication methodology which involves an accumulator, a full adder, and a control circuit. The accumulator and full adder were designed using VHDL in the Vivado IDE, whereas the control circuit was modelled using the powerful technique of State flow in Simulink. The 4 bit binary multiplier is then modelled and simulated using the combination of Simulink and VHDL. Results obtained from the simulation verified the accuracy of the design methodology.
url http://azojete.com.ng/index.php/azojete/article/view/116/106
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