PESL: System-Level Estimation of Power-Management Effect on Dynamic Energy Consumption
Power estimation is one of the key aspects that can help designers create digital circuits more effectively. If a designer is able to estimate circuit parameters during the early stages of development, correct decisions can be made that can significantly shorten the design time. The early design sta...
Main Authors: | Jaroslav Erdelyi, Dominik Macko, Katarina Jelemenska |
---|---|
Format: | Article |
Language: | English |
Published: |
MDPI AG
2020-08-01
|
Series: | Electronics |
Subjects: | |
Online Access: | https://www.mdpi.com/2079-9292/9/8/1313 |
Similar Items
-
Power System Parameter Estimation for Enhanced Grid Stability Assessment in Systems with Renewable Energy Sources
by: Schmitt, Andreas Joachim
Published: (2018) -
Mixed RTL and gate-level power estimation with low power design iteration
by: Nilsson, Jesper
Published: (2003) -
Automation of Dynamic Power Management in FPGA-Based Energy-Constrained Systems
by: Michal Skuta, et al.
Published: (2020-01-01) -
High Level Power Estimation and Reduction Techniques for Power Aware Hardware Design
by: Ahuja, Sumit
Published: (2014) -
System-Level Leakage Power Estimation Model for ASIC Designs
by: Abhishek Narayan Tripathi, et al.
Published: (2018-01-01)