Improved Device Distribution in High-Performance SiN<sub>x</sub> Resistive Random Access Memory via Arsenic Ion Implantation

Large device variation is a fundamental challenge for resistive random access memory (RRAM) array circuit. Improved device-to-device distributions of set and reset voltages in a SiN<sub>x</sub> RRAM device is realized via arsenic ion (As<sup>+</sup>) implantation. Besides, th...

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Bibliographic Details
Main Authors: Te-Jui Yen, Albert Chin, Vladimir Gritsenko
Format: Article
Language:English
Published: MDPI AG 2021-05-01
Series:Nanomaterials
Subjects:
Online Access:https://www.mdpi.com/2079-4991/11/6/1401
Description
Summary:Large device variation is a fundamental challenge for resistive random access memory (RRAM) array circuit. Improved device-to-device distributions of set and reset voltages in a SiN<sub>x</sub> RRAM device is realized via arsenic ion (As<sup>+</sup>) implantation. Besides, the As<sup>+</sup>-implanted SiN<sub>x</sub> RRAM device exhibits much tighter cycle-to-cycle distribution than the nonimplanted device. The As<sup>+</sup>-implanted SiN<sub>x</sub> device further exhibits excellent performance, which shows high stability and a large 1.73 × 10<sup>3</sup> resistance window at 85 °C retention for 10<sup>4</sup> s, and a large 10<sup>3</sup> resistance window after 10<sup>5</sup> cycles of the pulsed endurance test. The current–voltage characteristics of high- and low-resistance states were both analyzed as space-charge-limited conduction mechanism. From the simulated defect distribution in the SiN<sub>x</sub> layer, a microscopic model was established, and the formation and rupture of defect-conductive paths were proposed for the resistance switching behavior. Therefore, the reason for such high device performance can be attributed to the sufficient defects created by As<sup>+</sup> implantation that leads to low forming and operation power.
ISSN:2079-4991