High Speed Tracking System Using Single Chip Fpga

The main contribution of this paper to describes and implements the Castella tracking system (CTS) in high volume Field Programmable Gate Arrays (FPGA) devices, which presents the complete design of an adaptive two-state Kalman tracking filter that is suggested by Castella to track the maneuvering...

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Bibliographic Details
Main Authors: Dr. Dhafer R. Zaghar, Fatimah S. Abdulsattar, Dr. Khamis A. Zidan
Format: Article
Language:English
Published: Al-Nahrain Journal for Engineering Sciences 2017-06-01
Series:مجلة النهرين للعلوم الهندسية
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Online Access:https://nahje.com/index.php/main/article/view/265
Description
Summary:The main contribution of this paper to describes and implements the Castella tracking system (CTS) in high volume Field Programmable Gate Arrays (FPGA) devices, which presents the complete design of an adaptive two-state Kalman tracking filter that is suggested by Castella to track the maneuvering and nonmaneuvering targets using FPGA. The basic design for this system required a very high cost lie out of range of FPGA capacity. This paper will present a novel approach to reduce the cost of this system. The new method depends on the reduction of the width of data bus of the system without reduction the accuracy of the system. However the novel approach will reduce the cost to about 10% from the original cost to implement the system in a single chip FPGA. Finally, two simulation scenarios are also given to illustrate the efficiency of this adaptive filter comparing with the conventional Kalman filter.
ISSN:2521-9154
2521-9162