New design approaches of reversible BCD encoder using Peres and Feynman gates
This paper proposes two new design approaches for decimal to binary-coded-decimal (BCD) encoder using reversible logic through Peres gate (PG) and Feynman gate (FG) which consume 10 and 11 gates respectively to realize such circuitry. Gates have been arranged properly to minimize the gate count (GC)...
Main Authors: | , |
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Format: | Article |
Language: | English |
Published: |
Elsevier
2020-03-01
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Series: | ICT Express |
Online Access: | http://www.sciencedirect.com/science/article/pii/S2405959519300499 |