Study of a hysteresis window of FinFET and fully-depleted silicon-on-insulator (FDSOI) MOSFET with ferroelectric capacitor

• Main Authors: Chankeun Yoon, Seungjun Moon, Changhwan Shin
• Format: Article
• Language: English
• Published: SpringerOpen 2020-06-01
• Series: Nano Convergence
• Subjects: Hysteresis; Fully-depleted silicon-on-insulator (FDSOI) device; Fin-shaped field-effect-transistor (FinFET); Ferroelectric capacitor
• Online Access: http://link.springer.com/article/10.1186/s40580-020-00230-x
• ISSN: 2196-5404

Abstract In this work, the measured electrical characteristics of a fully depleted silicon-on-insulator (FDSOI) device and fin-shaped field-effect transistor (FinFET), whose gate electrode is connected in series to the bottom electrode of a ferroelectric capacitor (FE-FDSOI/FE-FinFET), are experimentally studied. The hysteretic property in input transfer characteristic of those devices is desirable for memory device applications, so that the understanding and modulating the hysteresis window is a key knob in designing the devices. It is experimentally observed that the hysteresis window of FE-FDSOI/FE-FinFET is decreased with (i) increasing the area of the ferroelectric capacitor and/or (ii) decreasing the gate area of baseline FET. The way how to control the hysteresis window of FE-FDSOI/FE-FinFET is proposed and discussed in detail.