A Technology Mapping of FSMs Based on a Graph of Excitations and Outputs

A logic synthesis for finite-state machines (FSMs) aimed at programmable array logic (PAL)-based complex programmable logic devices is proposed here. This approach consists of the simultaneous synthesis of a transition function and an output function. The main contribution is the novel multilevel op...

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Bibliographic Details
Main Authors: Marcin Kubica, Dariusz Kania, Jozef Kulisz
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Access
Subjects:
FSM
Online Access:https://ieeexplore.ieee.org/document/8626106/