Mapping of integrated PIN diodes with a 3D architecture by scanning microwave impedance microscopy and dynamic spectroscopy
This work addresses the need for a comprehensive methodology for nanoscale electrical testing dedicated to the analysis of both “front end of line” (FEOL) (doped semiconducting layers) and “back end of line” (BEOL) layers (metallization, trench dielectric, and isolation) of highly integrated microel...
Main Authors: | , , , , , , |
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Format: | Article |
Language: | English |
Published: |
Beilstein-Institut
2020-11-01
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Series: | Beilstein Journal of Nanotechnology |
Subjects: | |
Online Access: | https://doi.org/10.3762/bjnano.11.159 |