| Summary: | In order to solve the problem of bit error and short transmission distance in the process of LVDS high-speed link transmission, the optimization scheme is proposed from hardware and logic coding respectively. In the aspect of hardware, the high speed driver is added to the LVDS transmitter, and the adaptive equalizer is added at the receiver to compensate the attenuation of the signal in the long distance transmission and restore the distorted signal in the twisted pair. In the aspect of logic coding, the traditional 10B8B coding method is improved, and a 10B6B coding method with self correcting ability is designed, which not only improves the DC balance status of twisted pair, but also reduces the bit error rate in the LVDS transmission process. Compared with the normal coded LVDS interface, the optimized LVDS interface has a longer transmission distance and a smaller bit error rate. The design method is simple and reliable, and the performance is stable. The experimental results show that the zero error rate reliable transmission can be realized at 400 Mb/s rate under the 48 m differential twisted pair length.
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