Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor

Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor

Code size is a primary concern in the embedded computing community. Minimizing physical memory requirements reduces total system cost and improves performance and power efficiency. VLIW processors rely on the compiler to statically encode the ILP in the program before its execution, and becau...

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Bibliographic Details
Main Authors: Eric J. Stotzer, Ernst L. Leiss
Format: Article
Language:English
Published: Centro Latinoamericano de Estudios en Informática 2012-08-01
Series:CLEI Electronic Journal
Online Access:http://www.clei.org/cleiej-beta/index.php/cleiej/article/view/150
id doaj-66372200136240349e70b5e73e59f990
record_format Article
spelling doaj-66372200136240349e70b5e73e59f9902020-11-25T01:41:48ZengCentro Latinoamericano de Estudios en InformáticaCLEI Electronic Journal0717-50002012-08-0115210.19153/cleiej.15.2.3Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW ProcessorEric J. StotzerErnst L. Leiss Code size is a primary concern in the embedded computing community. Minimizing physical memory requirements reduces total system cost and improves performance and power efficiency. VLIW processors rely on the compiler to statically encode the ILP in the program before its execution, and because of this, code size is larger relative to other processors. In this paper we describe the co-design of compiler optimizations and processor architecture features that have progressively reduced code size across three generations of a VLIW processor. http://www.clei.org/cleiej-beta/index.php/cleiej/article/view/150
collection DOAJ
language English
format Article
sources DOAJ
author Eric J. Stotzer
Ernst L. Leiss
spellingShingle Eric J. Stotzer
Ernst L. Leiss
Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor
CLEI Electronic Journal
author_facet Eric J. Stotzer
Ernst L. Leiss
author_sort Eric J. Stotzer
title Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor
title_short Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor
title_full Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor
title_fullStr Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor
title_full_unstemmed Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor
title_sort co-design of compiler and hardware techniques to reduce program code size on a vliw processor
publisher Centro Latinoamericano de Estudios en Informática
series CLEI Electronic Journal
issn 0717-5000
publishDate 2012-08-01
description Code size is a primary concern in the embedded computing community. Minimizing physical memory requirements reduces total system cost and improves performance and power efficiency. VLIW processors rely on the compiler to statically encode the ILP in the program before its execution, and because of this, code size is larger relative to other processors. In this paper we describe the co-design of compiler optimizations and processor architecture features that have progressively reduced code size across three generations of a VLIW processor.
url http://www.clei.org/cleiej-beta/index.php/cleiej/article/view/150
work_keys_str_mv AT ericjstotzer codesignofcompilerandhardwaretechniquestoreduceprogramcodesizeonavliwprocessor
AT ernstlleiss codesignofcompilerandhardwaretechniquestoreduceprogramcodesizeonavliwprocessor
_version_ 1725039626685513728

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