XOR Multiplexing Technique for Nanocomputers

• Main Authors: Lianhua Yu, Ming Diao, Xiaobo Chen, Xiaochun Cheng
• Format: Article
• Language: English
• Published: MDPI AG 2020-04-01
• Series: Applied Sciences
• Subjects: nanoelectronic circuit; fault tolerant; XOR multiplexing technique; bifurcation analysis
• Online Access: https://www.mdpi.com/2076-3417/10/8/2825

In emerging nanotechnologies, due to the manufacturing process, a significant percentage of components may be faulty. In order to make systems based on unreliable nano-scale components reliable, it is necessary to design fault-tolerant architectures. This paper presents a novel fault-tolerant technique for nanocomputers, namely the XOR multiplexing technique. This hardware redundancy technique is based on a numerous duplication of faulty components. We analyze the error distributions of the XOR multiplexing unit and the error distributions of multiple stages of the XOR multiplexing system, then compare them to the NAND multiplexing unit and the NAND multiplexing multiple stages system, respectively. The simulation results show that XOR multiplexing is more reliable than NAND multiplexing. Bifurcation theory is used to analyze the fault-tolerant ability of the system and the results show that XOR multiplexing technique has a high fault-tolerant ability. Similarly to the NAND multiplexing technique, this fault-tolerant technique is a potentially effective fault tolerant technique for future nanoelectronics.