Design and construction of Video extractor

• Main Author: Baghdad Science Journal
• Format: Article
• Language: Arabic
• Published: College of Science for Women, University of Baghdad 2008-03-01
• Series: Baghdad Science Journal
• Online Access: http://bsj.uobaghdad.edu.iq/index.php/BSJ/article/view/873

Design and construction of video extractor circuit require an understanding of several parameters, which include: Selector circuit, extracting circuit which contains sampling signal and multiplexing. At each radar pulse, the video signal is fed to one of the selector. The fast filter has a pass –band from 190 Hz to 1800 Hz. These frequencies correspond to targets having radial velocities laying between and 10 Kph and 200 Kph.Slow filter: 60 Hz to 230 Hz for radial velocities laying between 3.5 and 13 Kph.The video- extractor is organized in four PCB CG (A-B-C-D) each one having 16 selector. The sampling signal (ADS) (1-2-3-4) control the 4-line-to-16-line decoders. 8 multiplexers of 8 inputs each, are required for the multiplexing of the 64 selectors.