| Summary: | Nowadays, microprocessors use the deep pipeline to execute multiple instructions per cycle. The frequency and behavior of conditional instructions mainly affect the performance of instruction-level parallelism. However, recent processors still have problems with the correct prediction of conditional branches. Firstly, the perceptron neural network and global-based perceptron prediction has been exploited and implemented. Further, a new approach, linear vector quantization (LVQ) neural network, is explored and implemented to see its possibility and potentiality as a branch predictor in terms of accuracy rate. Simulation is performed by varying the parameter of hardware budget and the length of history register using different trace files for identification of the best branch predictor technique. The proposed LVQ perceptron branch predictor achieves an 85.56% accuracy rate using a hardware budget and an 86.36% accuracy rate in terms of history length by comparing the simulation results.
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