Trigger Pulse Generator Using Proposed Buffered Delay Model and Its Application
This paper proposes a circuit capable of incorporating buffered delays in the order of picoseconds. To study our proposed circuit in the profound way, we have also explored our proposed circuit using emerging technologies such as FinFET and CNFET. Comparisons between these technologies have been mad...
Main Authors: | , , |
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Format: | Article |
Language: | English |
Published: |
Hindawi Limited
2015-01-01
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Series: | Active and Passive Electronic Components |
Online Access: | http://dx.doi.org/10.1155/2015/920508 |