Genetic algorithm for task mapping in embedded systems on a hierarchical architecture based on wireless network on chip WiNoC

• Main Authors: Maribell Sacanamboy Franco, Freddy Bolaños-Martinez, Álvaro Bernal-Noreña, Rubén Nieto-Londoño
• Format: Article
• Language: English
• Published: Universidad Nacional de Colombia 2017-06-01
• Series: Dyna
• Subjects: WiNoC; NoC; Wireless; Hierarchical; Genetic; Mapping
• Online Access: https://revistas.unal.edu.co/index.php/dyna/article/view/53886

Network on Chip (NoC) systems were originally developed to provide high performance, using the availability of several processing units, connected to a wired network inside the integrated circuit. Wireless NoC (WiNoC or WNoC) are a natural evolution of NoC systems, which integrate a hierarchical communication inside the chip for the sake of improving scalability. Task mapping in WNoC systems represents a challenging process, which often involves several optimization objectives, such as power, performance, throughput, resources usage, and network metrics. This paper describes a genetic algorithm based approach for finding optimal tasks-mapping solutions in design time, for embedded systems working over a WiNoC. The optimization objectives were: Speedup, Energy Consumption, and Bandwidth. The target network used for simulation may be viewed as a two-level hierarchical WiNoC. The first level corresponds to a set of subnets which are linked by wires and mesh-type. The second level corresponds to a star-topology of wireless links, which connect the first level subnets. Proposed algorithm exhibits a good performance in relation to the optimization objectives, concerning the target heterogeneous WiNoC.