Novel Driving Methods of Gate Driver for Enhancement- and Depletion-Mode Oxide TFTs

• Main Authors: Jongsu Oh, Kyung-Mo Jung, Eun Kyo Jung, Jungwoo Lee, Soo-Yeon Lee, Keechan Park, Jae-Hong Jeon, Yong-Sang Kim
• Format: Article
• Language: English
• Published: IEEE 2020-01-01
• Series: IEEE Journal of the Electron Devices Society
• Subjects: a-IGZO TFT; gate driver circuit; pull-down unit; enhancement mode; depletion mode; threshold voltage
• Online Access: https://ieeexplore.ieee.org/document/8947924/
• ISSN: 2168-6734

This paper introduces novel driving methods of the pull-down unit in a gate driver circuit for enhancement- and depletion-mode a-IGZO thin-film transistors (TFTs). The proposed gate driver circuit can achieve uniform output characteristics and effectively reduce the V_OUT ripple voltage because the threshold voltage (V_TH) of the pull-down units is compensated regardless of the a-IGZO TFT operation characteristics (enhancement mode: positive value of V_TH, depletion mode: negative value of V_TH). Many groups proposed the V_TH compensation method for pull-down TFTs in the gate driver circuit using a diode connection structure. However, the diode connection structure to extract the V_TH value cannot be applied in the depletion-mode oxide TFTs because TFT enters the turn-on state even when the V_GS value is 0 V. To solve this problem, we adopted the V_TH extraction period only once in one frame time. As a result, our circuit can compensate for V_TH of the pull-down unit in the enhancement mode and can be normally operated in the depletion mode. Adjunctively, two low signals (VGL1 and VGL2) and QC node were designed to prevent the leakage current path for Q and V_OUT nodes. To verify the threshold voltage tolerance for various stress conditions, we demonstrated the reliability of the circuit according to the threshold voltage change of the TFTs. The simulation result shows that all the VOUT waveforms are maintained at +28 V (VGH) under the V_TH shift conditions from -7 V to +11 V; further, the rising time and falling time are less than 0.62 μs and 0.96 μs, respectively. Based on a 120Hz ultra-high definition (UHD) graphics (3840×2160) display panel, the proposed circuit has uniform V_OUT characteristics compared to previous V_TH compensation circuit when ΔV_TH changes from -3 V to +11 V. When ΔV_TH changes from -4 V to -7 V, there is also no circuit malfunction, even with slight increase in the falling time and power consumption.