Hardware/Software Co-Design of a Traffic Sign Recognition System Using Zynq FPGAs
Traffic sign recognition (TSR), taken as an important component of an intelligent vehicle system, has been an emerging research topic in recent years. In this paper, a traffic sign detection system based on color segmentation, speeded-up robust features (SURF) detection and the k-nearest neighbor cl...
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doaj-4669e41d2b49498dafdd823bff7c7d4f2020-11-24T23:10:32ZengMDPI AGElectronics2079-92922015-12-01441062108910.3390/electronics4041062electronics4041062Hardware/Software Co-Design of a Traffic Sign Recognition System Using Zynq FPGAsYan Han0Kushal Virupakshappa1Esdras Vitor Silva Pinto2Erdal Oruklu3Department of Electrical and Computer Engineering, Illinois Institute of Technology, 3301 South Dearborn Street, Chicago, IL 60616, USADepartment of Electrical and Computer Engineering, Illinois Institute of Technology, 3301 South Dearborn Street, Chicago, IL 60616, USADepartment of Electrical and Computer Engineering, Illinois Institute of Technology, 3301 South Dearborn Street, Chicago, IL 60616, USADepartment of Electrical and Computer Engineering, Illinois Institute of Technology, 3301 South Dearborn Street, Chicago, IL 60616, USATraffic sign recognition (TSR), taken as an important component of an intelligent vehicle system, has been an emerging research topic in recent years. In this paper, a traffic sign detection system based on color segmentation, speeded-up robust features (SURF) detection and the k-nearest neighbor classifier is introduced. The proposed system benefits from the SURF detection algorithm, which achieves invariance to rotated, skewed and occluded signs. In addition to the accuracy and robustness issues, a TSR system should target a real-time implementation on an embedded system. Therefore, a hardware/software co-design architecture for a Zynq-7000 FPGA is presented as a major objective of this work. The sign detection operations are accelerated by programmable hardware logic that searches the potential candidates for sign classification. Sign recognition and classification uses a feature extraction and matching algorithm, which is implemented as a software component that runs on the embedded ARM CPU.http://www.mdpi.com/2079-9292/4/4/1062traffic sign recognitionFPGASURF detectorhardware/software co-design |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Yan Han Kushal Virupakshappa Esdras Vitor Silva Pinto Erdal Oruklu |
spellingShingle |
Yan Han Kushal Virupakshappa Esdras Vitor Silva Pinto Erdal Oruklu Hardware/Software Co-Design of a Traffic Sign Recognition System Using Zynq FPGAs Electronics traffic sign recognition FPGA SURF detector hardware/software co-design |
author_facet |
Yan Han Kushal Virupakshappa Esdras Vitor Silva Pinto Erdal Oruklu |
author_sort |
Yan Han |
title |
Hardware/Software Co-Design of a Traffic Sign Recognition System Using Zynq FPGAs |
title_short |
Hardware/Software Co-Design of a Traffic Sign Recognition System Using Zynq FPGAs |
title_full |
Hardware/Software Co-Design of a Traffic Sign Recognition System Using Zynq FPGAs |
title_fullStr |
Hardware/Software Co-Design of a Traffic Sign Recognition System Using Zynq FPGAs |
title_full_unstemmed |
Hardware/Software Co-Design of a Traffic Sign Recognition System Using Zynq FPGAs |
title_sort |
hardware/software co-design of a traffic sign recognition system using zynq fpgas |
publisher |
MDPI AG |
series |
Electronics |
issn |
2079-9292 |
publishDate |
2015-12-01 |
description |
Traffic sign recognition (TSR), taken as an important component of an intelligent vehicle system, has been an emerging research topic in recent years. In this paper, a traffic sign detection system based on color segmentation, speeded-up robust features (SURF) detection and the k-nearest neighbor classifier is introduced. The proposed system benefits from the SURF detection algorithm, which achieves invariance to rotated, skewed and occluded signs. In addition to the accuracy and robustness issues, a TSR system should target a real-time implementation on an embedded system. Therefore, a hardware/software co-design architecture for a Zynq-7000 FPGA is presented as a major objective of this work. The sign detection operations are accelerated by programmable hardware logic that searches the potential candidates for sign classification. Sign recognition and classification uses a feature extraction and matching algorithm, which is implemented as a software component that runs on the embedded ARM CPU. |
topic |
traffic sign recognition FPGA SURF detector hardware/software co-design |
url |
http://www.mdpi.com/2079-9292/4/4/1062 |
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