Formalizing Real-Time Embedded System into Promela

We propose an alternative of formalization of the real-time embedded system into Promela model. The proposed formal model supports the essential features of the real-time embedded system, including system resource-constrained handling, task prioritization, task synchronization, real-time preemption,...

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Main Authors: Sukvanich Punwess, Thongtak Arthit, Vatanawood Wiwat
Format: Article
Language:English
Published: EDP Sciences 2015-01-01
Series:MATEC Web of Conferences
Online Access:http://dx.doi.org/10.1051/matecconf/20153503003
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spelling doaj-3e301d3c116a41859d242f347024724d2021-04-02T13:50:45ZengEDP SciencesMATEC Web of Conferences2261-236X2015-01-01350300310.1051/matecconf/20153503003matecconf_icmce2015_03003Formalizing Real-Time Embedded System into PromelaSukvanich Punwess0Thongtak Arthit1Vatanawood Wiwat2Department of Computer Engineering, Faculty of Engineering, Chulalongkorn UniversityDepartment of Computer Engineering, Faculty of Engineering, Chulalongkorn UniversityDepartment of Computer Engineering, Faculty of Engineering, Chulalongkorn UniversityWe propose an alternative of formalization of the real-time embedded system into Promela model. The proposed formal model supports the essential features of the real-time embedded system, including system resource-constrained handling, task prioritization, task synchronization, real-time preemption, the parallelism of resources via DMA. Meanwhile, the model is also fully compatible with the partial order reduction algorithm for model checking. The timed automata of the real-time embedded system are considered and transformed into Promela, in our approach, by replacing time ticking into the repeated cycle of the timed values to do the conditional guard to enable the synchronization among the whole system operations. Our modeling approach could satisfactorily verify a small real-time system with parameterized dependent tasks and different scheduling topologies.http://dx.doi.org/10.1051/matecconf/20153503003
collection DOAJ
language English
format Article
sources DOAJ
author Sukvanich Punwess
Thongtak Arthit
Vatanawood Wiwat
spellingShingle Sukvanich Punwess
Thongtak Arthit
Vatanawood Wiwat
Formalizing Real-Time Embedded System into Promela
MATEC Web of Conferences
author_facet Sukvanich Punwess
Thongtak Arthit
Vatanawood Wiwat
author_sort Sukvanich Punwess
title Formalizing Real-Time Embedded System into Promela
title_short Formalizing Real-Time Embedded System into Promela
title_full Formalizing Real-Time Embedded System into Promela
title_fullStr Formalizing Real-Time Embedded System into Promela
title_full_unstemmed Formalizing Real-Time Embedded System into Promela
title_sort formalizing real-time embedded system into promela
publisher EDP Sciences
series MATEC Web of Conferences
issn 2261-236X
publishDate 2015-01-01
description We propose an alternative of formalization of the real-time embedded system into Promela model. The proposed formal model supports the essential features of the real-time embedded system, including system resource-constrained handling, task prioritization, task synchronization, real-time preemption, the parallelism of resources via DMA. Meanwhile, the model is also fully compatible with the partial order reduction algorithm for model checking. The timed automata of the real-time embedded system are considered and transformed into Promela, in our approach, by replacing time ticking into the repeated cycle of the timed values to do the conditional guard to enable the synchronization among the whole system operations. Our modeling approach could satisfactorily verify a small real-time system with parameterized dependent tasks and different scheduling topologies.
url http://dx.doi.org/10.1051/matecconf/20153503003
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AT thongtakarthit formalizingrealtimeembeddedsystemintopromela
AT vatanawoodwiwat formalizingrealtimeembeddedsystemintopromela
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