Novel NoC Topology Construction for High-Performance Communications
Different intellectual property (IP) cores, including processor and memory, are interconnected to build a typical system-on-chip (SoC) architecture. Larger SoC designs dictate the data communication to happen over the global interconnects. Network-on-Chip(NoC) architectures have been proposed as a s...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Hindawi Limited
2011-01-01
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| Series: | Journal of Computer Networks and Communications |
| Online Access: | http://dx.doi.org/10.1155/2011/405697 |