A memristor-based supervised neural network algorithm and its circuit design

This paper introduces a way to realize the supervised neural network algorithms based on memristive characteristics on Field Programmable Gate Array(FPGA) for the problem that how to take the memristors into artificial neural networks and hardware implement. This design uses memristors module as wei...

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Main Authors:	Tang Zhiri, Zhu Ruohua, Chang Sheng
Format:	Article
Language:	zho
Published:	National Computer System Engineering Research Institute of China 2019-04-01
Series:	Dianzi Jishu Yingyong
Subjects:	memristor supervised neural network Field Programmable Gate Array pattern recognition resource occupancies
Online Access:	http://www.chinaaet.com/article/3000100084

id	doaj-368f04d7071141e5ac51ae50350cd543
record_format	Article
spelling	doaj-368f04d7071141e5ac51ae50350cd5432020-11-25T01:51:03ZzhoNational Computer System Engineering Research Institute of ChinaDianzi Jishu Yingyong0258-79982019-04-01454192210.16157/j.issn.0258-7998.1900183000100084A memristor-based supervised neural network algorithm and its circuit designTang Zhiri0Zhu Ruohua1Chang Sheng2School of Physics and Technology，Wuhan University，Wuhan 430072，ChinaSchool of Physics and Technology，Wuhan University，Wuhan 430072，ChinaSchool of Physics and Technology，Wuhan University，Wuhan 430072，ChinaThis paper introduces a way to realize the supervised neural network algorithms based on memristive characteristics on Field Programmable Gate Array(FPGA) for the problem that how to take the memristors into artificial neural networks and hardware implement. This design uses memristors module as weight store module in neural network to build supervised learning with error feedback mechanism. The memristive neural networks are used in pattern recognition and their hardware resource and processing speed are optimized. Experiment results show that the performance of pattern recognition is quite good. Further, the hardware resource occupancies and training time are 11 773 logic elements(LEs) and 0.33 ms on Cyclone II：EP2C70F896I8, respectively, and the test time of images is 10 μs, which gives a useful reference for combination of memristors and neural networks.http://www.chinaaet.com/article/3000100084memristorsupervised neural networkField Programmable Gate Arraypattern recognitionresource occupancies
collection	DOAJ
language	zho
format	Article
sources	DOAJ
author	Tang Zhiri Zhu Ruohua Chang Sheng
spellingShingle	Tang Zhiri Zhu Ruohua Chang Sheng A memristor-based supervised neural network algorithm and its circuit design Dianzi Jishu Yingyong memristor supervised neural network Field Programmable Gate Array pattern recognition resource occupancies
author_facet	Tang Zhiri Zhu Ruohua Chang Sheng
author_sort	Tang Zhiri
title	A memristor-based supervised neural network algorithm and its circuit design
title_short	A memristor-based supervised neural network algorithm and its circuit design
title_full	A memristor-based supervised neural network algorithm and its circuit design
title_fullStr	A memristor-based supervised neural network algorithm and its circuit design
title_full_unstemmed	A memristor-based supervised neural network algorithm and its circuit design
title_sort	memristor-based supervised neural network algorithm and its circuit design
publisher	National Computer System Engineering Research Institute of China
series	Dianzi Jishu Yingyong
issn	0258-7998
publishDate	2019-04-01
description	This paper introduces a way to realize the supervised neural network algorithms based on memristive characteristics on Field Programmable Gate Array(FPGA) for the problem that how to take the memristors into artificial neural networks and hardware implement. This design uses memristors module as weight store module in neural network to build supervised learning with error feedback mechanism. The memristive neural networks are used in pattern recognition and their hardware resource and processing speed are optimized. Experiment results show that the performance of pattern recognition is quite good. Further, the hardware resource occupancies and training time are 11 773 logic elements(LEs) and 0.33 ms on Cyclone II：EP2C70F896I8, respectively, and the test time of images is 10 μs, which gives a useful reference for combination of memristors and neural networks.
topic	memristor supervised neural network Field Programmable Gate Array pattern recognition resource occupancies
url	http://www.chinaaet.com/article/3000100084
work_keys_str_mv	AT tangzhiri amemristorbasedsupervisedneuralnetworkalgorithmanditscircuitdesign AT zhuruohua amemristorbasedsupervisedneuralnetworkalgorithmanditscircuitdesign AT changsheng amemristorbasedsupervisedneuralnetworkalgorithmanditscircuitdesign AT tangzhiri memristorbasedsupervisedneuralnetworkalgorithmanditscircuitdesign AT zhuruohua memristorbasedsupervisedneuralnetworkalgorithmanditscircuitdesign AT changsheng memristorbasedsupervisedneuralnetworkalgorithmanditscircuitdesign
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A memristor-based supervised neural network algorithm and its circuit design

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