Optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via OS scheduling.

Optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via OS scheduling.

Most of chip multiprocessors (CMPs) are symmetric, i.e. they are composed of identical cores. These CMPs may consist of complex cores (e.g., Intel Haswell or IBM Power8) or simple and lower-power cores (e.g. ARM Cortex A9 or Intel Xeon Phi). Cores in the former approach have advanced microarchitectu...

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Bibliographic Details
Main Author: Adrian Pousa
Format: Article
Language:English
Published: Postgraduate Office, School of Computer Science, Universidad Nacional de La Plata 2018-06-01
Series:Journal of Computer Science and Technology
Online Access:http://journal.info.unlp.edu.ar/JCST/article/view/879
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spelling doaj-32cd773e565348f091be74d8f0c2a1a42020-11-24T21:56:44ZengPostgraduate Office, School of Computer Science, Universidad Nacional de La PlataJournal of Computer Science and Technology1666-60461666-60382018-06-011801e09e0910.24215/16666038.18.e09879Optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via OS scheduling.Adrian Pousa0III-LIDI (Institute of Research in Computer Sciences LIDI), Facultad de Informática. Universidad Nacional de La Plata. La Plata, 1900, Argentina.Most of chip multiprocessors (CMPs) are symmetric, i.e. they are composed of identical cores. These CMPs may consist of complex cores (e.g., Intel Haswell or IBM Power8) or simple and lower-power cores (e.g. ARM Cortex A9 or Intel Xeon Phi). Cores in the former approach have advanced microarchitectural features, such as out-of-order super-scalar pipelines, and they are suitable for running sequential applications which use them efficiently. Cores in the latter approach have a simple microarchitecture and are good for running applications with high thread-level parallelism (TLP).http://journal.info.unlp.edu.ar/JCST/article/view/879
collection DOAJ
language English
format Article
sources DOAJ
author Adrian Pousa
spellingShingle Adrian Pousa
Optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via OS scheduling.
Journal of Computer Science and Technology
author_facet Adrian Pousa
author_sort Adrian Pousa
title Optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via OS scheduling.
title_short Optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via OS scheduling.
title_full Optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via OS scheduling.
title_fullStr Optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via OS scheduling.
title_full_unstemmed Optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via OS scheduling.
title_sort optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via os scheduling.
publisher Postgraduate Office, School of Computer Science, Universidad Nacional de La Plata
series Journal of Computer Science and Technology
issn 1666-6046
1666-6038
publishDate 2018-06-01
description Most of chip multiprocessors (CMPs) are symmetric, i.e. they are composed of identical cores. These CMPs may consist of complex cores (e.g., Intel Haswell or IBM Power8) or simple and lower-power cores (e.g. ARM Cortex A9 or Intel Xeon Phi). Cores in the former approach have advanced microarchitectural features, such as out-of-order super-scalar pipelines, and they are suitable for running sequential applications which use them efficiently. Cores in the latter approach have a simple microarchitecture and are good for running applications with high thread-level parallelism (TLP).
url http://journal.info.unlp.edu.ar/JCST/article/view/879
work_keys_str_mv AT adrianpousa optimizationofthroughputfairnessandenergyefficiencyonasymmetricmulticoresystemsviaosscheduling
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