Encoding of Terms in EMB-Based Mealy FSMs
A method is proposed targeting implementation of FPGA-based Mealy finite state machines. The main goal of the method is a reduction for the number of look-up table (LUT) elements and their levels in FSM logic circuits. To do it, it is necessary to eliminate the direct dependence of input memory func...
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doaj-309998afa4694474b0aae821a8fb63c12020-11-25T02:28:43ZengMDPI AGApplied Sciences2076-34172020-04-01102762276210.3390/app10082762Encoding of Terms in EMB-Based Mealy FSMsAlexander Barkalov0Larysa Titarenko1Małgorzata Mazurkiewicz2Kazimierz Krzywicki3Institute of Metrology, Electronics and Computer Science, University of Zielona Góra, ul. Licealna 9, 65-417 Zielona Góra, PolandInstitute of Metrology, Electronics and Computer Science, University of Zielona Góra, ul. Licealna 9, 65-417 Zielona Góra, PolandInstitute of Control & Computation Engineering, University of Zielona Góra, ul. Licealna 9, 65-417 Zielona Góra, PolandInstitute of Computer Science and Technology, The Jacob of Paradies University, ul. Teatralna 25, 66-400 Gorzów Wielkopolski, PolandA method is proposed targeting implementation of FPGA-based Mealy finite state machines. The main goal of the method is a reduction for the number of look-up table (LUT) elements and their levels in FSM logic circuits. To do it, it is necessary to eliminate the direct dependence of input memory functions and FSM output functions on FSM inputs and state variables. The method is based on encoding of the terms corresponding to rows of direct structure tables. In such an approach, only terms depend on FSM inputs and state variables. Other functions depend on variables representing terms. The method belongs to the group of the methods of structural decomposition. The set of terms is divided by classes such that each class corresponds to a single-level LUT-based circuit. An embedded memory block (EMB) generates codes of both classes and terms as elements of these classes. The mutual using LUTs and EMB allows diminishing chip area occupied by FSM circuit (as compared to its LUT-based counterpart). The simple sequential algorithm is proposed for finding the partition of the set of terms by a determined number of classes. The method is based on representation of an FSM by a state transition table. However, it can be used for any known form of FSM specification. The example of synthesis is shown. The efficiency of the proposed method was investigated using a library of standard benchmarks. We compared the proposed with some other known design methods. The investigations show that the proposed method gives better results than other discussed methods. It allows the obtaining of FSM circuits with three levels of logic and regular interconnections.https://www.mdpi.com/2076-3417/10/8/2762mealy finite state machinesynthesisstructural decompositionFPGAlook-up table elementsLUT |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Alexander Barkalov Larysa Titarenko Małgorzata Mazurkiewicz Kazimierz Krzywicki |
spellingShingle |
Alexander Barkalov Larysa Titarenko Małgorzata Mazurkiewicz Kazimierz Krzywicki Encoding of Terms in EMB-Based Mealy FSMs Applied Sciences mealy finite state machine synthesis structural decomposition FPGA look-up table elements LUT |
author_facet |
Alexander Barkalov Larysa Titarenko Małgorzata Mazurkiewicz Kazimierz Krzywicki |
author_sort |
Alexander Barkalov |
title |
Encoding of Terms in EMB-Based Mealy FSMs |
title_short |
Encoding of Terms in EMB-Based Mealy FSMs |
title_full |
Encoding of Terms in EMB-Based Mealy FSMs |
title_fullStr |
Encoding of Terms in EMB-Based Mealy FSMs |
title_full_unstemmed |
Encoding of Terms in EMB-Based Mealy FSMs |
title_sort |
encoding of terms in emb-based mealy fsms |
publisher |
MDPI AG |
series |
Applied Sciences |
issn |
2076-3417 |
publishDate |
2020-04-01 |
description |
A method is proposed targeting implementation of FPGA-based Mealy finite state machines. The main goal of the method is a reduction for the number of look-up table (LUT) elements and their levels in FSM logic circuits. To do it, it is necessary to eliminate the direct dependence of input memory functions and FSM output functions on FSM inputs and state variables. The method is based on encoding of the terms corresponding to rows of direct structure tables. In such an approach, only terms depend on FSM inputs and state variables. Other functions depend on variables representing terms. The method belongs to the group of the methods of structural decomposition. The set of terms is divided by classes such that each class corresponds to a single-level LUT-based circuit. An embedded memory block (EMB) generates codes of both classes and terms as elements of these classes. The mutual using LUTs and EMB allows diminishing chip area occupied by FSM circuit (as compared to its LUT-based counterpart). The simple sequential algorithm is proposed for finding the partition of the set of terms by a determined number of classes. The method is based on representation of an FSM by a state transition table. However, it can be used for any known form of FSM specification. The example of synthesis is shown. The efficiency of the proposed method was investigated using a library of standard benchmarks. We compared the proposed with some other known design methods. The investigations show that the proposed method gives better results than other discussed methods. It allows the obtaining of FSM circuits with three levels of logic and regular interconnections. |
topic |
mealy finite state machine synthesis structural decomposition FPGA look-up table elements LUT |
url |
https://www.mdpi.com/2076-3417/10/8/2762 |
work_keys_str_mv |
AT alexanderbarkalov encodingoftermsinembbasedmealyfsms AT larysatitarenko encodingoftermsinembbasedmealyfsms AT małgorzatamazurkiewicz encodingoftermsinembbasedmealyfsms AT kazimierzkrzywicki encodingoftermsinembbasedmealyfsms |
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