An FPGA-based silicon neuronal network with selectable excitability silicon neurons

• Main Authors: Jing eLi, Yuichi eKatori, Takashi eKohno
• Format: Article
• Language: English
• Published: Frontiers Media S.A. 2012-12-01
• Series: Frontiers in Neuroscience
• Subjects: Associative Memory; FPGA; synchrony; Silicon neurons; silicon synapse; digital silicon neuronal network
• Online Access: http://journal.frontiersin.org/Journal/10.3389/fnins.2012.00183/full

This paper presents a digital silicon neuronal network which simulates the nerve system in creatures and has the ability to execute intelligent tasks, such as associative memory. Two essential elements, the mathematical-structure-based digital spiking silicon neuron (DSSN) and the transmitter release based silicon synapse, allow the network to show rich dynamic behaviors and are computationally efficient for hardware implementation. We adopt mixed pipeline and parallel structure and shift operations to design a sufficient large and complex network without excessive hardware resource cost. The network with $256$ full-connected neurons is built on a Digilent Atlys board equipped with a Xilinx Spartan-6 LX45 FPGA. Besides, a memory control block and USB control block are designed to accomplish the task of data communication between the network and the host PC. This paper also describes the mechanism of associative memory performed in the silicon neuronal network. The network is capable of retrieving stored patterns if the inputs contain enough information of them. The retrieving probability increases with the similarity between the input and the stored pattern increasing. Synchronization of neurons is observed when the successful stored pattern retrieval occurs.